Coding style fix and minor improvements.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9977 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
rsun3 2010-02-11 02:33:16 +00:00
parent 548dda8f74
commit 4140a6635b
23 changed files with 113 additions and 420 deletions

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@ -1,7 +1,7 @@
/** @file
SCSI disk driver that layers on every SCSI IO protocol in the system.
Copyright (c) 2006 - 2009, Intel Corporation. <BR>
Copyright (c) 2006 - 2010, Intel Corporation. <BR>
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -2372,9 +2372,9 @@ GetParentProtocol (
This function is used by the IDE bus driver to get inquiry data. Data format
of Identify data is defined by the Interface GUID.
@param[in] This Pointer to the EFI_DISK_INFO_PROTOCOL instance.
@param[in,out] InquiryData Pointer to a buffer for the inquiry data.
@param[in,out] InquiryDataSize Pointer to the value for the inquiry data size.
@param[in] This Pointer to the EFI_DISK_INFO_PROTOCOL instance.
@param[in, out] InquiryData Pointer to a buffer for the inquiry data.
@param[in, out] InquiryDataSize Pointer to the value for the inquiry data size.
@retval EFI_SUCCESS The command was accepted without any errors.
@retval EFI_NOT_FOUND Device does not support this data class
@ -2411,10 +2411,10 @@ ScsiDiskInfoInquiry (
This function is used by the IDE bus driver to get identify data. Data format
of Identify data is defined by the Interface GUID.
@param[in] This Pointer to the EFI_DISK_INFO_PROTOCOL
@param[in] This Pointer to the EFI_DISK_INFO_PROTOCOL
instance.
@param[in,out] IdentifyData Pointer to a buffer for the identify data.
@param[in,out] IdentifyDataSize Pointer to the value for the identify data
@param[in, out] IdentifyData Pointer to a buffer for the identify data.
@param[in, out] IdentifyDataSize Pointer to the value for the identify data
size.
@retval EFI_SUCCESS The command was accepted without any errors.
@ -2458,10 +2458,10 @@ ScsiDiskInfoIdentify (
This function is used by the IDE bus driver to get sense data.
Data format of Sense data is defined by the Interface GUID.
@param[in] This Pointer to the EFI_DISK_INFO_PROTOCOL instance.
@param[in,out] SenseData Pointer to the SenseData.
@param[in,out] SenseDataSize Size of SenseData in bytes.
@param[out] SenseDataNumber Pointer to the value for the sense data size.
@param[in] This Pointer to the EFI_DISK_INFO_PROTOCOL instance.
@param[in, out] SenseData Pointer to the SenseData.
@param[in, out] SenseDataSize Size of SenseData in bytes.
@param[out] SenseDataNumber Pointer to the value for the sense data size.
@retval EFI_SUCCESS The command was accepted without any errors.
@retval EFI_NOT_FOUND Device does not support this data class.

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@ -1,7 +1,7 @@
/** @file
Header file for SCSI Disk Driver.
Copyright (c) 2004 - 2009, Intel Corporation. <BR>
Copyright (c) 2004 - 2010, Intel Corporation. <BR>
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -406,9 +406,9 @@ ScsiDiskFlushBlocks (
This function is used by the IDE bus driver to get inquiry data. Data format
of Identify data is defined by the Interface GUID.
@param[in] This Pointer to the EFI_DISK_INFO_PROTOCOL instance.
@param[in,out] InquiryData Pointer to a buffer for the inquiry data.
@param[in,out] InquiryDataSize Pointer to the value for the inquiry data size.
@param[in] This Pointer to the EFI_DISK_INFO_PROTOCOL instance.
@param[in, out] InquiryData Pointer to a buffer for the inquiry data.
@param[in, out] InquiryDataSize Pointer to the value for the inquiry data size.
@retval EFI_SUCCESS The command was accepted without any errors.
@retval EFI_NOT_FOUND Device does not support this data class
@ -433,8 +433,8 @@ ScsiDiskInfoInquiry (
@param[in] This Pointer to the EFI_DISK_INFO_PROTOCOL
instance.
@param[in,out] IdentifyData Pointer to a buffer for the identify data.
@param[in,out] IdentifyDataSize Pointer to the value for the identify data
@param[in, out] IdentifyData Pointer to a buffer for the identify data.
@param[in, out] IdentifyDataSize Pointer to the value for the identify data
size.
@retval EFI_SUCCESS The command was accepted without any errors.
@ -458,10 +458,10 @@ ScsiDiskInfoIdentify (
This function is used by the IDE bus driver to get sense data.
Data format of Sense data is defined by the Interface GUID.
@param[in] This Pointer to the EFI_DISK_INFO_PROTOCOL instance.
@param[in,out] SenseData Pointer to the SenseData.
@param[in,out] SenseDataSize Size of SenseData in bytes.
@param[out] SenseDataNumber Pointer to the value for the sense data size.
@param[in] This Pointer to the EFI_DISK_INFO_PROTOCOL instance.
@param[in, out] SenseData Pointer to the SenseData.
@param[in, out] SenseDataSize Size of SenseData in bytes.
@param[out] SenseDataNumber Pointer to the value for the sense data size.
@retval EFI_SUCCESS The command was accepted without any errors.
@retval EFI_NOT_FOUND Device does not support this data class.

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@ -1,7 +1,7 @@
/** @file
Helper functions to parse HID report descriptor and items.
Copyright (c) 2004 - 2008, Intel Corporation
Copyright (c) 2004 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -92,7 +92,7 @@ GetNextHidItem (
// 1-byte data
//
if ((EndPos - StartPos) >= 1) {
HidItem->Data.U8 = *StartPos++;
HidItem->Data.Uint8 = *StartPos++;
return StartPos;
}
@ -101,7 +101,7 @@ GetNextHidItem (
// 2-byte data
//
if ((EndPos - StartPos) >= 2) {
CopyMem (&HidItem->Data.U16, StartPos, sizeof (UINT16));
CopyMem (&HidItem->Data.Uint16, StartPos, sizeof (UINT16));
StartPos += 2;
return StartPos;
}
@ -112,7 +112,7 @@ GetNextHidItem (
//
HidItem->Size = 4;
if ((EndPos - StartPos) >= 4) {
CopyMem (&HidItem->Data.U32, StartPos, sizeof (UINT32));
CopyMem (&HidItem->Data.Uint32, StartPos, sizeof (UINT32));
StartPos += 4;
return StartPos;
}
@ -145,11 +145,11 @@ GetItemData (
//
switch (HidItem->Size) {
case 1:
return HidItem->Data.U8;
return HidItem->Data.Uint8;
case 2:
return HidItem->Data.U16;
return HidItem->Data.Uint16;
case 4:
return HidItem->Data.U32;
return HidItem->Data.Uint32;
}
return 0;
}

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@ -80,12 +80,12 @@ typedef struct {
///
typedef union {
UINT8 U8;
UINT16 U16;
UINT32 U32;
INT8 I8;
INT16 I16;
INT32 I32;
UINT8 Uint8;
UINT16 Uint16;
UINT32 Uint32;
INT8 Int8;
INT16 Int16;
INT32 Int32;
UINT8 *LongData;
} HID_DATA;

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@ -1,7 +1,7 @@
/** @file
Helper functions to parse HID report descriptor and items.
Copyright (c) 2004 - 2008, Intel Corporation
Copyright (c) 2004 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -92,7 +92,7 @@ GetNextHidItem (
// 1-byte data
//
if ((EndPos - StartPos) >= 1) {
HidItem->Data.U8 = *StartPos++;
HidItem->Data.Uint8 = *StartPos++;
return StartPos;
}
@ -101,7 +101,7 @@ GetNextHidItem (
// 2-byte data
//
if ((EndPos - StartPos) >= 2) {
CopyMem (&HidItem->Data.U16, StartPos, sizeof (UINT16));
CopyMem (&HidItem->Data.Uint16, StartPos, sizeof (UINT16));
StartPos += 2;
return StartPos;
}
@ -112,7 +112,7 @@ GetNextHidItem (
//
HidItem->Size = 4;
if ((EndPos - StartPos) >= 4) {
CopyMem (&HidItem->Data.U32, StartPos, sizeof (UINT32));
CopyMem (&HidItem->Data.Uint32, StartPos, sizeof (UINT32));
StartPos += 4;
return StartPos;
}
@ -145,11 +145,11 @@ GetItemData (
//
switch (HidItem->Size) {
case 1:
return HidItem->Data.U8;
return HidItem->Data.Uint8;
case 2:
return HidItem->Data.U16;
return HidItem->Data.Uint16;
case 4:
return HidItem->Data.U32;
return HidItem->Data.Uint32;
}
return 0;
}

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@ -80,12 +80,12 @@ typedef struct {
///
typedef union {
UINT8 U8;
UINT16 U16;
UINT32 U32;
INT8 I8;
INT16 I16;
INT32 I32;
UINT8 Uint8;
UINT16 Uint16;
UINT32 Uint32;
INT8 Int8;
INT16 Int16;
INT32 Int32;
UINT8 *LongData;
} HID_DATA;

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@ -36,8 +36,8 @@
DxeLoad.c
[Sources.Ia32]
Ia32/VirtualMemory.h ||||PcdDxeIplSwitchToLongMode
Ia32/VirtualMemory.c ||||PcdDxeIplSwitchToLongMode
X64/VirtualMemory.h ||||PcdDxeIplSwitchToLongMode
X64/VirtualMemory.c ||||PcdDxeIplSwitchToLongMode
Ia32/DxeLoadFunc.c
Ia32/IdtVectorAsm.asm||||PcdDxeIplSwitchToLongMode
Ia32/IdtVectorAsm.S ||||PcdDxeIplSwitchToLongMode

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@ -1,157 +0,0 @@
/** @file
x64 Virtual Memory Management Services in the form of an IA-32 driver.
Used to establish a 1:1 Virtual to Physical Mapping that is required to
enter Long Mode (x64 64-bit mode).
While we make a 1:1 mapping (identity mapping) for all physical pages
we still need to use the MTRR's to ensure that the cachability attributes
for all memory regions is correct.
The basic idea is to use 2MB page table entries where ever possible. If
more granularity of cachability is required then 4K page tables are used.
References:
1) IA-32 Intel(R) Architecture Software Developer's Manual Volume 1:Basic Architecture, Intel
2) IA-32 Intel(R) Architecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
3) IA-32 Intel(R) Architecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
Copyright (c) 2006 - 2008, Intel Corporation. <BR>
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "DxeIpl.h"
#include "VirtualMemory.h"
/**
Allocates and fills in the Page Directory and Page Table Entries to
establish a 1:1 Virtual to Physical mapping.
@param NumberOfProcessorPhysicalAddressBits Number of processor address bits
to use. Limits the number of page
table entries to the physical
address space.
@return The address of 4 level page map.
**/
UINTN
CreateIdentityMappingPageTables (
VOID
)
{
UINT8 PhysicalAddressBits;
EFI_PHYSICAL_ADDRESS PageAddress;
UINTN IndexOfPml4Entries;
UINTN IndexOfPdpEntries;
UINTN IndexOfPageDirectoryEntries;
UINTN NumberOfPml4EntriesNeeded;
UINTN NumberOfPdpEntriesNeeded;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
PAGE_TABLE_ENTRY *PageDirectoryEntry;
UINTN TotalPagesNum;
UINTN BigPageAddress;
VOID *Hob;
//
// Get physical address bits supported from CPU HOB.
//
PhysicalAddressBits = 36;
Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
if (Hob != NULL) {
PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
}
//
// Calculate the table entries needed.
//
if (PhysicalAddressBits <= 39 ) {
NumberOfPml4EntriesNeeded = 1;
NumberOfPdpEntriesNeeded = 1 << (PhysicalAddressBits - 30);
} else {
NumberOfPml4EntriesNeeded = 1 << (PhysicalAddressBits - 39);
NumberOfPdpEntriesNeeded = 512;
}
//
// Pre-allocate big pages to avoid later allocations.
//
TotalPagesNum = (NumberOfPdpEntriesNeeded + 1) * NumberOfPml4EntriesNeeded + 1;
BigPageAddress = (UINTN) AllocatePages (TotalPagesNum);
ASSERT (BigPageAddress != 0);
//
// By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
//
PageMap = (VOID *) BigPageAddress;
BigPageAddress += EFI_PAGE_SIZE;
PageMapLevel4Entry = PageMap;
PageAddress = 0;
for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {
//
// Each PML4 entry points to a page of Page Directory Pointer entires.
// So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
//
PageDirectoryPointerEntry = (VOID *) BigPageAddress;
BigPageAddress += EFI_PAGE_SIZE;
//
// Make a PML4 Entry
//
PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry;
PageMapLevel4Entry->Bits.ReadWrite = 1;
PageMapLevel4Entry->Bits.Present = 1;
for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
//
// Each Directory Pointer entries points to a page of Page Directory entires.
// So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
//
PageDirectoryEntry = (VOID *) BigPageAddress;
BigPageAddress += EFI_PAGE_SIZE;
//
// Fill in a Page Directory Pointer Entries
//
PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry;
PageDirectoryPointerEntry->Bits.ReadWrite = 1;
PageDirectoryPointerEntry->Bits.Present = 1;
for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += 0x200000) {
//
// Fill in the Page Directory entries
//
PageDirectoryEntry->Uint64 = (UINT64)PageAddress;
PageDirectoryEntry->Bits.ReadWrite = 1;
PageDirectoryEntry->Bits.Present = 1;
PageDirectoryEntry->Bits.MustBe1 = 1;
}
}
}
//
// For the PML4 entries we are not using fill in a null entry.
// For now we just copy the first entry.
//
for (; IndexOfPml4Entries < 512; IndexOfPml4Entries++, PageMapLevel4Entry++) {
CopyMem (
PageMapLevel4Entry,
PageMap,
sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)
);
}
return (UINTN)PageMap;
}

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@ -1,158 +0,0 @@
/** @file
x64 Long Mode Virtual Memory Management Definitions
References:
1) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 1:Basic Architecture, Intel
2) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
3) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
4) AMD64 Architecture Programmer's Manual Volume 2: System Programming
Copyright (c) 2006 - 2008, Intel Corporation. <BR>
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _VIRTUAL_MEMORY_H_
#define _VIRTUAL_MEMORY_H_
#define SYS_CODE64_SEL 0x38
#pragma pack(1)
typedef union {
struct {
UINT32 LimitLow : 16;
UINT32 BaseLow : 16;
UINT32 BaseMid : 8;
UINT32 Type : 4;
UINT32 System : 1;
UINT32 Dpl : 2;
UINT32 Present : 1;
UINT32 LimitHigh : 4;
UINT32 Software : 1;
UINT32 Reserved : 1;
UINT32 DefaultSize : 1;
UINT32 Granularity : 1;
UINT32 BaseHigh : 8;
} Bits;
UINT64 Uint64;
} IA32_GDT;
typedef struct {
IA32_IDT_GATE_DESCRIPTOR Ia32IdtEntry;
UINT32 Offset32To63;
UINT32 Reserved;
} X64_IDT_GATE_DESCRIPTOR;
//
// Page-Map Level-4 Offset (PML4) and
// Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB
//
typedef union {
struct {
UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Reserved:1; // Reserved
UINT64 MustBeZero:2; // Must Be Zero
UINT64 Available:3; // Available for use by system software
UINT64 PageTableBaseAddress:40; // Page Table Base Address
UINT64 AvabilableHigh:11; // Available for use by system software
UINT64 Nx:1; // No Execute bit
} Bits;
UINT64 Uint64;
} PAGE_MAP_AND_DIRECTORY_POINTER;
//
// Page Table Entry 2MB
//
typedef union {
struct {
UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page
UINT64 MustBe1:1; // Must be 1
UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write
UINT64 Available:3; // Available for use by system software
UINT64 PAT:1; //
UINT64 MustBeZero:8; // Must be zero;
UINT64 PageTableBaseAddress:31; // Page Table Base Address
UINT64 AvabilableHigh:11; // Available for use by system software
UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution
} Bits;
UINT64 Uint64;
} PAGE_TABLE_ENTRY;
#pragma pack()
/**
Allocates and fills in the Page Directory and Page Table Entries to
establish a 1:1 Virtual to Physical mapping.
@param NumberOfProcessorPhysicalAddressBits Number of processor address bits
to use. Limits the number of page
table entries to the physical
address space.
@return The address of 4 level page map.
**/
UINTN
CreateIdentityMappingPageTables (
VOID
);
/**
Fix up the vector number in the vector code.
@param VectorBase Base address of the vector handler.
@param VectorNum Index of vector.
**/
VOID
EFIAPI
AsmVectorFixup (
VOID *VectorBase,
UINT8 VectorNum
);
/**
Get the information of vector template.
@param TemplateBase Base address of the template code.
@return Size of the Template code.
**/
UINTN
EFIAPI
AsmGetVectorTemplatInfo (
OUT VOID **TemplateBase
);
#endif

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@ -4,18 +4,18 @@
enter Long Mode (x64 64-bit mode).
While we make a 1:1 mapping (identity mapping) for all physical pages
we still need to use the MTRR's to ensure that the cachability attirbutes
we still need to use the MTRR's to ensure that the cachability attributes
for all memory regions is correct.
The basic idea is to use 2MB page table entries where ever possible. If
more granularity of cachability is required then 4K page tables are used.
References:
1) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 1:Basic Architecture, Intel
2) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
3) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
1) IA-32 Intel(R) Architecture Software Developer's Manual Volume 1:Basic Architecture, Intel
2) IA-32 Intel(R) Architecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
3) IA-32 Intel(R) Architecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
Copyright (c) 2006 - 2008, Intel Corporation. <BR>
Copyright (c) 2006 - 2010, Intel Corporation. <BR>
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -51,8 +51,8 @@ CreateIdentityMappingPageTables (
UINTN IndexOfPml4Entries;
UINTN IndexOfPdpEntries;
UINTN IndexOfPageDirectoryEntries;
UINTN NumberOfPml4EntriesNeeded;
UINTN NumberOfPdpEntriesNeeded;
UINT32 NumberOfPml4EntriesNeeded;
UINT32 NumberOfPdpEntriesNeeded;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
@ -71,14 +71,22 @@ CreateIdentityMappingPageTables (
PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;
}
//
// IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.
//
ASSERT (PhysicalAddressBits <= 52);
if (PhysicalAddressBits > 48) {
PhysicalAddressBits = 48;
}
//
// Calculate the table entries needed.
//
if (PhysicalAddressBits <= 39 ) {
NumberOfPml4EntriesNeeded = 1;
NumberOfPdpEntriesNeeded = LShiftU64 (1, (PhysicalAddressBits - 30));
NumberOfPdpEntriesNeeded = 1 << (PhysicalAddressBits - 30);
} else {
NumberOfPml4EntriesNeeded = LShiftU64 (1, (PhysicalAddressBits - 39));
NumberOfPml4EntriesNeeded = 1 << (PhysicalAddressBits - 39);
NumberOfPdpEntriesNeeded = 512;
}

View File

@ -75,7 +75,7 @@ DiscoverPeimsAndOrderWithApriori (
//
// Go ahead to scan this Fv, and cache FileHandles within it.
//
for (PeimCount = 0; PeimCount < PcdGet32 (PcdPeiCoreMaxPeimPerFv); PeimCount++) {
for (PeimCount = 0; PeimCount < FixedPcdGet32 (PcdPeiCoreMaxPeimPerFv); PeimCount++) {
Status = FvPpi->FindFileByType (FvPpi, PEI_CORE_INTERNAL_FFS_FILE_DISPATCH_TYPE, CoreFileHandle->FvHandle, &FileHandle);
if (Status != EFI_SUCCESS) {
break;
@ -88,7 +88,7 @@ DiscoverPeimsAndOrderWithApriori (
// Check whether the count of Peims exceeds the max support PEIMs in a FV image
// If more Peims are required in a FV image, PcdPeiCoreMaxPeimPerFv can be set to a larger value in DSC file.
//
ASSERT (PeimCount < PcdGet32 (PcdPeiCoreMaxPeimPerFv));
ASSERT (PeimCount < FixedPcdGet32 (PcdPeiCoreMaxPeimPerFv));
//
// Get Apriori File handle
@ -598,7 +598,7 @@ PeiDispatcher (
PEI_CORE_FV_HANDLE *CoreFvHandle;
VOID *LoadFixPeiCodeBegin;
PeiServices = (CONST EFI_PEI_SERVICES **) &Private->PS;
PeiServices = (CONST EFI_PEI_SERVICES **) &Private->Ps;
PeimEntryPoint = NULL;
PeimFileHandle = NULL;
EntryPoint = 0;
@ -613,11 +613,11 @@ PeiDispatcher (
SaveCurrentFileHandle = Private->CurrentFileHandle;
for (Index1 = 0; Index1 <= SaveCurrentFvCount; Index1++) {
for (Index2 = 0; (Index2 < PcdGet32 (PcdPeiCoreMaxPeimPerFv)) && (Private->Fv[Index1].FvFileHandles[Index2] != NULL); Index2++) {
for (Index2 = 0; (Index2 < FixedPcdGet32 (PcdPeiCoreMaxPeimPerFv)) && (Private->Fv[Index1].FvFileHandles[Index2] != NULL); Index2++) {
if (Private->Fv[Index1].PeimState[Index2] == PEIM_STATE_REGISITER_FOR_SHADOW) {
PeimFileHandle = Private->Fv[Index1].FvFileHandles[Index2];
Status = PeiLoadImage (
(CONST EFI_PEI_SERVICES **) &Private->PS,
(CONST EFI_PEI_SERVICES **) &Private->Ps,
PeimFileHandle,
PEIM_STATE_REGISITER_FOR_SHADOW,
&EntryPoint,
@ -637,7 +637,7 @@ PeiDispatcher (
PeimEntryPoint = (EFI_PEIM_ENTRY_POINT2)(UINTN)EntryPoint;
PERF_START (PeimFileHandle, "PEIM", NULL, 0);
PeimEntryPoint(PeimFileHandle, (const EFI_PEI_SERVICES **) &Private->PS);
PeimEntryPoint(PeimFileHandle, (const EFI_PEI_SERVICES **) &Private->Ps);
PERF_END (PeimFileHandle, "PEIM", NULL, 0);
}
@ -699,7 +699,7 @@ PeiDispatcher (
// Start to dispatch all modules within the current Fv.
//
for (PeimCount = Private->CurrentPeimCount;
(PeimCount < PcdGet32 (PcdPeiCoreMaxPeimPerFv)) && (Private->CurrentFvFileHandles[PeimCount] != NULL);
(PeimCount < FixedPcdGet32 (PcdPeiCoreMaxPeimPerFv)) && (Private->CurrentFvFileHandles[PeimCount] != NULL);
PeimCount++) {
Private->CurrentPeimCount = PeimCount;
PeimFileHandle = Private->CurrentFileHandle = Private->CurrentFvFileHandles[PeimCount];
@ -891,12 +891,12 @@ PeiDispatcher (
//
// Fixup the PeiCore's private data
//
PrivateInMem->PS = &PrivateInMem->ServiceTableShadow;
PrivateInMem->Ps = &PrivateInMem->ServiceTableShadow;
PrivateInMem->CpuIo = &PrivateInMem->ServiceTableShadow.CpuIo;
PrivateInMem->HobList.Raw = (VOID*) ((UINTN) PrivateInMem->HobList.Raw + HeapOffset);
PrivateInMem->StackBase = (EFI_PHYSICAL_ADDRESS)(((UINTN)PrivateInMem->PhysicalMemoryBegin + EFI_PAGE_MASK) & ~EFI_PAGE_MASK);
PeiServices = (CONST EFI_PEI_SERVICES **) &PrivateInMem->PS;
PeiServices = (CONST EFI_PEI_SERVICES **) &PrivateInMem->Ps;
//
// Fixup for PeiService's address
@ -1120,7 +1120,7 @@ DepexSatisfied (
//
// Evaluate a given DEPEX
//
return PeimDispatchReadiness (&Private->PS, DepexData);
return PeimDispatchReadiness (&Private->Ps, DepexData);
}
/**

View File

@ -368,8 +368,8 @@ FirmwareVolmeInfoPpiNotifyCallback (
Status = EFI_SUCCESS;
PrivateData = PEI_CORE_INSTANCE_FROM_PS_THIS (PeiServices);
if (PrivateData->FvCount >= PcdGet32 (PcdPeiCoreMaxFvSupported)) {
DEBUG ((EFI_D_ERROR, "The number of Fv Images (%d) exceed the max supported FVs (%d) in Pei", PrivateData->FvCount + 1, PcdGet32 (PcdPeiCoreMaxFvSupported)));
if (PrivateData->FvCount >= FixedPcdGet32 (PcdPeiCoreMaxFvSupported)) {
DEBUG ((EFI_D_ERROR, "The number of Fv Images (%d) exceed the max supported FVs (%d) in Pei", PrivateData->FvCount + 1, FixedPcdGet32 (PcdPeiCoreMaxFvSupported)));
DEBUG ((EFI_D_ERROR, "PcdPeiCoreMaxFvSupported value need be reconfigurated in DSC"));
ASSERT (FALSE);
}
@ -1156,7 +1156,7 @@ PeiFfs2FvPpiGetFileInfo (
return EFI_INVALID_PARAMETER;
}
if (CoreFvHandle->FvHeader->Attributes & EFI_FVB2_ERASE_POLARITY) {
if ((CoreFvHandle->FvHeader->Attributes & EFI_FVB2_ERASE_POLARITY) != 0) {
ErasePolarity = 1;
} else {
ErasePolarity = 0;
@ -1417,7 +1417,7 @@ PeiReinitializeFv (
//
// Fixup all FvPpi pointers for the implementation in flash to permanent memory.
//
for (Index = 0; Index < PcdGet32 (PcdPeiCoreMaxFvSupported); Index ++) {
for (Index = 0; Index < FixedPcdGet32 (PcdPeiCoreMaxFvSupported); Index ++) {
if (PrivateData->Fv[Index].FvPpi == OldFfs2FvPpi) {
PrivateData->Fv[Index].FvPpi = &mPeiFfs2FvPpi;
}
@ -1452,7 +1452,7 @@ AddUnknownFormatFvInfo (
{
PEI_CORE_UNKNOW_FORMAT_FV_INFO *NewUnknownFv;
if (PrivateData->UnknownFvInfoCount + 1 >= PcdGet32 (PcdPeiCoreMaxPeimPerFv)) {
if (PrivateData->UnknownFvInfoCount + 1 >= FixedPcdGet32 (PcdPeiCoreMaxPeimPerFv)) {
return EFI_OUT_OF_RESOURCES;
}

View File

@ -52,9 +52,9 @@ InitializeMemoryServices (
);
//
// Set PS to point to ServiceTableShadow in Cache
// Set Ps to point to ServiceTableShadow in Cache
//
PrivateData->PS = &(PrivateData->ServiceTableShadow);
PrivateData->Ps = &(PrivateData->ServiceTableShadow);
}
return;

View File

@ -140,7 +140,7 @@ typedef struct{
///
/// Point to ServiceTableShadow
///
EFI_PEI_SERVICES *PS;
EFI_PEI_SERVICES *Ps;
PEI_PPI_DATABASE PpiData;
///
@ -180,7 +180,7 @@ typedef struct{
//
// For Loading modules at fixed address feature to cache the top address below which the
// Runtime code, boot time code and PEI memory will be placed. Please note that the offset between this field
// and PS should not be changed since maybe user could get this top address by using the offet to PS.
// and Ps should not be changed since maybe user could get this top address by using the offet to Ps.
//
EFI_PHYSICAL_ADDRESS LoadModuleAtFixAddressTopAddress;
//
@ -195,7 +195,7 @@ typedef struct{
/// Pei Core Instance Data Macros
///
#define PEI_CORE_INSTANCE_FROM_PS_THIS(a) \
CR(a, PEI_CORE_INSTANCE, PS, PEI_CORE_HANDLE_SIGNATURE)
CR(a, PEI_CORE_INSTANCE, Ps, PEI_CORE_HANDLE_SIGNATURE)
/**
Function Pointer type for PeiCore function.

View File

@ -148,12 +148,12 @@ PeiCore (
CopyMem (&PrivateData.ServiceTableShadow, &gPs, sizeof (gPs));
}
PrivateData.PS = &PrivateData.ServiceTableShadow;
PrivateData.Ps = &PrivateData.ServiceTableShadow;
//
// Initialize libraries that the PeiCore is linked against
//
ProcessLibraryConstructorList (NULL, (CONST EFI_PEI_SERVICES **)&PrivateData.PS);
ProcessLibraryConstructorList (NULL, (CONST EFI_PEI_SERVICES **)&PrivateData.Ps);
InitializeMemoryServices (&PrivateData, SecCoreData, OldCoreData);
@ -162,7 +162,7 @@ PeiCore (
//
// Save PeiServicePointer so that it can be retrieved anywhere.
//
SetPeiServicesTablePointer((CONST EFI_PEI_SERVICES **) &PrivateData.PS);
SetPeiServicesTablePointer((CONST EFI_PEI_SERVICES **) &PrivateData.Ps);
if (OldCoreData != NULL) {
@ -205,7 +205,7 @@ PeiCore (
}
}
InitializeSecurityServices (&PrivateData.PS, OldCoreData);
InitializeSecurityServices (&PrivateData.Ps, OldCoreData);
InitializeDispatcherData (&PrivateData, OldCoreData, SecCoreData);
@ -244,7 +244,7 @@ PeiCore (
DEBUG ((EFI_D_INFO, "DXE IPL Entry\n"));
Status = TempPtr.DxeIpl->Entry (
TempPtr.DxeIpl,
&PrivateData.PS,
&PrivateData.Ps,
PrivateData.HobList
);
//

View File

@ -30,9 +30,9 @@ InitializePpiServices (
)
{
if (OldCoreData == NULL) {
PrivateData->PpiData.NotifyListEnd = PcdGet32 (PcdPeiCoreMaxPpiSupported)-1;
PrivateData->PpiData.DispatchListEnd = PcdGet32 (PcdPeiCoreMaxPpiSupported)-1;
PrivateData->PpiData.LastDispatchedNotify = PcdGet32 (PcdPeiCoreMaxPpiSupported)-1;
PrivateData->PpiData.NotifyListEnd = FixedPcdGet32 (PcdPeiCoreMaxPpiSupported)-1;
PrivateData->PpiData.DispatchListEnd = FixedPcdGet32 (PcdPeiCoreMaxPpiSupported)-1;
PrivateData->PpiData.LastDispatchedNotify = FixedPcdGet32 (PcdPeiCoreMaxPpiSupported)-1;
}
}
@ -60,7 +60,7 @@ ConvertPpiPointers (
UINT8 Index;
PEI_PPI_LIST_POINTERS *PpiPointer;
for (Index = 0; Index < PcdGet32 (PcdPeiCoreMaxPpiSupported); Index++) {
for (Index = 0; Index < FixedPcdGet32 (PcdPeiCoreMaxPpiSupported); Index++) {
if (Index < PrivateData->PpiData.PpiListEnd ||
Index > PrivateData->PpiData.NotifyListEnd) {
PpiPointer = &PrivateData->PpiData.PpiListPtrs[Index];
@ -254,7 +254,7 @@ PeiReInstallPpi (
// Remove the old PPI from the database, add the new one.
//
DEBUG((EFI_D_INFO, "Reinstall PPI: %g\n", NewPpi->Guid));
ASSERT (Index < (INTN)(PcdGet32 (PcdPeiCoreMaxPpiSupported)));
ASSERT (Index < (INTN)(FixedPcdGet32 (PcdPeiCoreMaxPpiSupported)));
PrivateData->PpiData.PpiListPtrs[Index].Ppi = (EFI_PEI_PPI_DESCRIPTOR *) NewPpi;
//
@ -512,7 +512,7 @@ ProcessNotifyList (
EFI_PEI_PPI_DESCRIPTOR_NOTIFY_DISPATCH,
PrivateData->PpiData.LastDispatchedInstall,
PrivateData->PpiData.PpiListEnd,
PcdGet32 (PcdPeiCoreMaxPpiSupported)-1,
FixedPcdGet32 (PcdPeiCoreMaxPpiSupported)-1,
PrivateData->PpiData.DispatchListEnd
);
PrivateData->PpiData.LastDispatchedInstall = TempValue;

View File

@ -1,7 +1,7 @@
/** @file
EFI PEI Core Security services
Copyright (c) 2006, Intel Corporation
Copyright (c) 2006 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -113,7 +113,7 @@ VerifyPeim (
// Check to see if the image is OK
//
Status = PrivateData->PrivateSecurityPpi->AuthenticationState (
(CONST EFI_PEI_SERVICES **) &PrivateData->PS,
(CONST EFI_PEI_SERVICES **) &PrivateData->Ps,
PrivateData->PrivateSecurityPpi,
AuthenticationStatus,
VolumeHandle,

View File

@ -910,7 +910,7 @@ DevPathToTextSata (
SATA_DEVICE_PATH *Sata;
Sata = DevPath;
if (Sata->PortMultiplierPortNumber & SATA_HBA_DIRECT_CONNECT_FLAG) {
if ((Sata->PortMultiplierPortNumber & SATA_HBA_DIRECT_CONNECT_FLAG) != 0) {
CatPrint (
Str,
L"Sata(0x%x,0x%x)",

View File

@ -1,8 +1,8 @@
/** @file
Implementation of reading the current interrupt status and recycled transmit
buffer status from a network interface.
Implementation of reading the current interrupt status and recycled transmit
buffer status from a network interface.
Copyright (c) 2004 - 2007, Intel Corporation. <BR>
Copyright (c) 2004 - 2010, Intel Corporation. <BR>
All rights reserved. This program and the accompanying materials are licensed
and made available under the terms and conditions of the BSD License which
accompanies this distribution. The full text of the license may be found at
@ -115,8 +115,8 @@ PxeGetStatus (
if (TransmitBufferListPtr != NULL) {
*TransmitBufferListPtr =
(
(Snp->Cdb.StatFlags & PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN) ||
(Snp->Cdb.StatFlags & PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY)
((Snp->Cdb.StatFlags & PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN) != 0) ||
((Snp->Cdb.StatFlags & PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY) != 0)
) ? 0 : (VOID *) (UINTN) Db->TxBuffer[0];
}

View File

@ -1,7 +1,7 @@
/** @file
Implementation of receiving a packet from a network interface.
Implementation of receiving a packet from a network interface.
Copyright (c) 2004 - 2007, Intel Corporation. <BR>
Copyright (c) 2004 - 2010, Intel Corporation. <BR>
All rights reserved. This program and the accompanying materials are licensed
and made available under the terms and conditions of the BSD License which
accompanies this distribution. The full text of the license may be found at
@ -225,7 +225,7 @@ SnpUndi32Receive (
goto ON_EXIT;
}
if (!Snp->Mode.ReceiveFilterSetting) {
if (Snp->Mode.ReceiveFilterSetting == 0) {
Status = EFI_DEVICE_ERROR;
goto ON_EXIT;
}

View File

@ -3,7 +3,7 @@
produce the implementation of native PCD protocol and EFI_PCD_PROTOCOL defined in
PI 1.2 Vol3.
Copyright (c) 2006 - 2009, Intel Corporation
Copyright (c) 2006 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -968,7 +968,7 @@ DxeUnRegisterCallBackOnSet (
@param[in] Guid The 128-bit unique value that designates the namespace from which to retrieve the next token.
This is an optional parameter that may be NULL. If this parameter is NULL, then a request is
being made to retrieve tokens from the default token space.
@param[in,out] TokenNumber
@param[in, out] TokenNumber
A pointer to the PCD token number to use to find the subsequent token number.
@retval EFI_SUCCESS The PCD service retrieved the next valid token number. Or the input token number

View File

@ -699,7 +699,7 @@ DxeUnRegisterCallBackOnSet (
@param[in] Guid The 128-bit unique value that designates the namespace from which to retrieve the next token.
This is an optional parameter that may be NULL. If this parameter is NULL, then a request is
being made to retrieve tokens from the default token space.
@param[in,out] TokenNumber
@param[in, out] TokenNumber
A pointer to the PCD token number to use to find the subsequent token number.
@retval EFI_SUCCESS The PCD service retrieved the next valid token number. Or the input token number

View File

@ -1,7 +1,7 @@
/** @file
Utility functions for expression evaluation.
Copyright (c) 2007 - 2009, Intel Corporation
Copyright (c) 2007 - 2010, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -1717,7 +1717,7 @@ EvaluateExpression (
// When converting from an unsigned integer, zero will be converted to
// FALSE and any other value will be converted to TRUE.
//
Value->Value.b = (BOOLEAN) ((Value->Value.u64) ? TRUE : FALSE);
Value->Value.b = (BOOLEAN) (Value->Value.u64 != 0);
Value->Type = EFI_IFR_TYPE_BOOLEAN;
} else if (Value->Type == EFI_IFR_TYPE_STRING) {