MdePkg BaseMemoryLibSse2: Convert X64/ZeroMem.asm to NASM

The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
X64/ZeroMem.asm to X64/ZeroMem.nasm

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>

MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.inf

@@ -101,6 +101,7 @@
   X64/ScanMem8.asm
   X64/CompareMem.nasm
   X64/CompareMem.asm
+  X64/ZeroMem.nasm
   X64/ZeroMem.asm
   X64/SetMem64.asm
   X64/SetMem32.asm
@@ -117,6 +118,7 @@
   X64/ScanMem8.S
   X64/CompareMem.nasm
   X64/CompareMem.S
+  X64/ZeroMem.nasm
   X64/ZeroMem.S
   X64/SetMem64.S
   X64/SetMem32.S

MdePkg/Library/BaseMemoryLibSse2/X64/ZeroMem.nasm

@@ -0,0 +1,65 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+;   ZeroMem.nasm
+;
+; Abstract:
+;
+;   ZeroMem function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+    DEFAULT REL
+    SECTION .text
+
+;------------------------------------------------------------------------------
+;  VOID *
+;  InternalMemZeroMem (
+;    IN VOID   *Buffer,
+;    IN UINTN  Count
+;    )
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMemZeroMem)
+ASM_PFX(InternalMemZeroMem):
+    push    rdi
+    mov     rdi, rcx
+    xor     rcx, rcx
+    xor     eax, eax
+    sub     rcx, rdi
+    and     rcx, 15
+    mov     r8, rdi
+    jz      .0
+    cmp     rcx, rdx
+    cmova   rcx, rdx
+    sub     rdx, rcx
+    rep     stosb
+.0:
+    mov     rcx, rdx
+    and     edx, 15
+    shr     rcx, 4
+    jz      @ZeroBytes
+    pxor    xmm0, xmm0
+.1:
+    movntdq [rdi], xmm0                 ; rdi should be 16-byte aligned
+    add     rdi, 16
+    loop    .1
+    mfence
+@ZeroBytes:
+    mov     ecx, edx
+    rep     stosb
+    mov     rax, r8
+    pop     rdi
+    ret
+