tyler.durden
/
audk
mirror of https://github.com/acidanthera/audk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

UefiCpuPkg/CpuDxe: remove all code to flush TLB for APs 

The reason doing this is that we found that calling StartupAllAps() to
flush TLB for all APs in CpuDxe driver after changing page attributes
will spend a lot of time to complete. If there are many page attributes
update requests, the whole system performance will be slowed down
explicitly, including any shell command and UI operation.

The solution is removing the flush operation for AP in CpuDxe driver
and let AP flush TLB after woken up.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
This commit is contained in:
Jian J Wang 2018-01-29 09:26:31 +08:00 committed by Ruiyu Ni
parent 199de89677
commit 41a9c3fd11
1 changed files with 5 additions and 80 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

85
UefiCpuPkg/CpuDxe/CpuPageTable.c
View File

@ -89,70 +89,6 @@ PAGE_ATTRIBUTE_TABLE mPageAttributeTable[] = {
PAGE_TABLE_POOL *mPageTablePool = NULL;
/**
Enable write protection function for AP.
@param[in,out] Buffer The pointer to private data buffer.
**/
VOID
EFIAPI
SyncCpuEnableWriteProtection (
IN OUT VOID *Buffer
)
{
AsmWriteCr0 (AsmReadCr0 () | BIT16);
}
/**
CpuFlushTlb function for AP.
@param[in,out] Buffer The pointer to private data buffer.
**/
VOID
EFIAPI
SyncCpuFlushTlb (
IN OUT VOID *Buffer
)
{
CpuFlushTlb();
}
/**
Sync memory page attributes for AP.
@param[in] Procedure A pointer to the function to be run on enabled APs of
the system.
**/
VOID
SyncMemoryPageAttributesAp (
IN EFI_AP_PROCEDURE Procedure
)
{
EFI_STATUS Status;
EFI_MP_SERVICES_PROTOCOL *MpService;
Status = gBS->LocateProtocol (
&gEfiMpServiceProtocolGuid,
NULL,
(VOID **)&MpService
);
//
// Synchronize the update with all APs
//
if (!EFI_ERROR (Status)) {
Status = MpService->StartupAllAPs (
MpService, // This
Procedure, // Procedure
FALSE, // SingleThread
NULL, // WaitEvent
0, // TimeoutInMicrosecsond
NULL, // ProcedureArgument
NULL // FailedCpuList
);
ASSERT (Status == EFI_SUCCESS || Status == EFI_NOT_STARTED || Status == EFI_NOT_READY);
}
}
/**
Return current paging context.
@ -574,20 +510,6 @@ IsReadOnlyPageWriteProtected (
return ((AsmReadCr0 () & BIT16) != 0);
}
/**
Disable write protection function for AP.
@param[in,out] Buffer The pointer to private data buffer.
**/
VOID
EFIAPI
SyncCpuDisableWriteProtection (
IN OUT VOID *Buffer
)
{
AsmWriteCr0 (AsmReadCr0() & ~BIT16);
}
/**
Disable Write Protect on pages marked as read-only.
**/
@ -835,10 +757,13 @@ AssignMemoryPageAttributes (
if (!EFI_ERROR(Status)) {
if ((PagingContext == NULL) && IsModified) {
//
// Flush TLB as last step
// Flush TLB as last step.
//
// Note: Since APs will always init CR3 register in HLT loop mode or do
// TLB flush in MWAIT loop mode, there's no need to flush TLB for them
// here.
//
CpuFlushTlb();
SyncMemoryPageAttributesAp (SyncCpuFlushTlb);
}
}