mirror of https://github.com/acidanthera/audk.git
MdePkg: Add SIO related protocol/PPI definitions.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17503 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ruiyu Ni
niruiyu
parent
e6dce6443d
commit
42c9d9f8a3
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/** @file
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This PPI opens or closes an I/O aperture in a ISA HOST controller.
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Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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||||
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@par Revision Reference:
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This PPI is from PI Version 1.2.1.
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**/
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#ifndef __ISA_HC_PPI_H__
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#define __ISA_HC_PPI_H__
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#define EFI_ISA_HC_PPI_GUID \
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{ \
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0x8d48bd70, 0xc8a3, 0x4c06, {0x90, 0x1b, 0x74, 0x79, 0x46, 0xaa, 0xc3, 0x58} \
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}
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typedef struct _EFI_ISA_HC_PPI EFI_ISA_HC_PPI;
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typedef struct _EFI_ISA_HC_PPI *PEFI_ISA_HC_PPI;
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/**
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Open I/O aperture.
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This function opens an I/O aperture in a ISA Host Controller for the I/O
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addresses specified by IoAddress to IoAddress + IoLength - 1. It is possible
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that more than one caller may be assigned to the same aperture.
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It may be possible that a single hardware aperture may be used for more than
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one device. This function tracks the number of times that each aperture is
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referenced, and doesa not close the hardware aperture (via CloseIoAperture())
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until there are no more references to it.
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@param This A pointer to this instance of the EFI_ISA_HC_PPI.
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@param IoAddress An unsigned integer that specifies the first byte of
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the I/O space required.
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@param IoLength An unsigned integer that specifies the number of
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bytes of the I/O space required.
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@param IoApertureHandle A pointer to the returned I/O aperture handle.
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This value can be used on subsequent calls to CloseIoAperture().
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@retval EFI_SUCCESS The I/O aperture was opened successfully.
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@retval EFI_UNSUPPORTED The ISA Host Controller is a subtractive-decode controller.
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@retval EFI_OUT_OF_RESOURCES There is no available I/O aperture.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_ISA_HC_OPEN_IO) (
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IN CONST EFI_ISA_HC_PPI *This,
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IN UINT16 IoAddress,
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IN UINT16 IoLength,
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OUT UINT64 *IoApertureHandle
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);
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/**
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Close I/O aperture.
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This function closes a previously opened I/O aperture handle. If there are no
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more I/O aperture handles that refer to the hardware I/O aperture resource,
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then the hardware I/O aperture is closed.
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It may be possible that a single hardware aperture may be used for more than
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one device. This function tracks the number of times that each aperture is
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referenced, and does not close the hardware aperture (via CloseIoAperture())
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until there are no more references to it.
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@param This A pointer to this instance of the EFI_ISA_HC_PPI.
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@param IoApertureHandle The I/O aperture handle previously returned from a
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call to OpenIoAperture().
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@retval EFI_SUCCESS The I/O aperture was closed successfully.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_ISA_HC_CLOSE_IO) (
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IN CONST EFI_ISA_HC_PPI *This,
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IN UINT64 IoApertureHandle
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);
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///
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/// This PPI provides functions for opening or closing an I/O aperture.
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///
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struct _EFI_ISA_HC_PPI {
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///
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/// An unsigned integer that specifies the version of the PPI structure.
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///
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UINT32 Version;
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///
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/// The address of the ISA/LPC Bridge device.
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/// For PCI, this is the segment, bus, device and function of the a ISA/LPC
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/// Bridge device.
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///
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/// If bits 24-31 are 0, then the definition is:
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/// Bits 0:2 - Function
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/// Bits 3-7 - Device
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/// Bits 8:15 - Bus
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/// Bits 16-23 - Segment
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/// Bits 24-31 - Bus Type
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/// If bits 24-31 are 0xff, then the definition is platform-specific.
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///
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UINT32 Address;
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///
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/// Opens an aperture on a positive-decode ISA Host Controller.
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///
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EFI_PEI_ISA_HC_OPEN_IO OpenIoAperture;
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///
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/// Closes an aperture on a positive-decode ISA Host Controller.
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///
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EFI_PEI_ISA_HC_CLOSE_IO CloseIoAperture;
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};
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extern EFI_GUID gEfiIsaHcPpiGuid;
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#endif
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@ -0,0 +1,183 @@
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/** @file
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This PPI provides the super I/O register access functionality.
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Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@par Revision Reference:
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This PPI is from PI Version 1.2.1.
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**/
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#ifndef __EFI_SUPER_IO_PPI_H__
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#define __EFI_SUPER_IO_PPI_H__
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#include <Protocol/SuperIo.h>
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#define EFI_SIO_PPI_GUID \
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{ \
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0x23a464ad, 0xcb83, 0x48b8, {0x94, 0xab, 0x1a, 0x6f, 0xef, 0xcf, 0xe5, 0x22} \
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}
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typedef struct _EFI_SIO_PPI EFI_SIO_PPI;
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typedef struct _EFI_SIO_PPI *PEFI_SIO_PPI;
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typedef UINT16 EFI_SIO_REGISTER;
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#define EFI_SIO_REG(ldn,reg) (EFI_SIO_REGISTER) (((ldn) << 8) | reg)
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#define EFI_SIO_LDN_GLOBAL 0xFF
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/**
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Read a Super I/O register.
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The register is specified as an 8-bit logical device number and an 8-bit
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register value. The logical device numbers for specific SIO devices can be
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determined using the Info member of the PPI structure.
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@param This A pointer to this instance of the EFI_SIO_PPI.
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@param ExitCfgMode A boolean specifying whether the driver should turn on
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configuration mode (FALSE) or turn off configuration mode
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(TRUE) after completing the read operation. The driver must
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track the current state of the configuration mode (if any)
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and turn on configuration mode (if necessary) prior to
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register access.
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@param Register A value specifying the logical device number (bits 15:8)
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and the register to read (bits 7:0). The logical device
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number of EFI_SIO_LDN_GLOBAL indicates that global
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registers will be used.
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@param IoData A pointer to the returned register value.
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@retval EFI_SUCCESS Success.
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@regval EFI_TIMEOUT The register could not be read in the a reasonable
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amount of time. The exact time is device-specific.
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@retval EFI_INVALID_PARAMETERS Register was out of range for this device.
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@retval EFI_INVALID_PARAMETERS IoData was NULL
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@retval EFI_DEVICE_ERROR There was a device fault or the device was not present.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_SIO_REGISTER_READ)(
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IN CONST EFI_SIO_PPI *This,
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IN BOOLEAN ExitCfgMode,
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IN EFI_SIO_REGISTER Register,
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OUT UINT8 *IoData
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);
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/**
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Write a Super I/O register.
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The register is specified as an 8-bit logical device number and an 8-bit register
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value. The logical device numbers for specific SIO devices can be determined
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using the Info member of the PPI structure.
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@param This A pointer to this instance of the EFI_SIO_PPI.
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@param ExitCfgMode A boolean specifying whether the driver should turn on
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configuration mode (FALSE) or turn off configuration mode
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(TRUE) after completing the read operation. The driver must
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track the current state of the configuration mode (if any)
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and turn on configuration mode (if necessary) prior to
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register access.
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@param Register A value specifying the logical device number (bits 15:8)
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and the register to read (bits 7:0). The logical device
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number of EFI_SIO_LDN_GLOBAL indicates that global
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registers will be used.
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@param IoData A pointer to the returned register value.
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@retval EFI_SUCCESS Success.
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@regval EFI_TIMEOUT The register could not be read in the a reasonable
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amount of time. The exact time is device-specific.
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@retval EFI_INVALID_PARAMETERS Register was out of range for this device.
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@retval EFI_INVALID_PARAMETERS IoData was NULL
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@retval EFI_DEVICE_ERROR There was a device fault or the device was not present.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_SIO_REGISTER_WRITE)(
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IN CONST EFI_SIO_PPI *This,
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IN BOOLEAN ExitCfgMode,
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IN EFI_SIO_REGISTER Register,
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IN UINT8 IoData
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);
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/**
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Provides an interface for a table based programming of the Super I/O registers.
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The Modify() function provides an interface for table based programming of the
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Super I/O registers. This function can be used to perform programming of
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multiple Super I/O registers with a single function call. For each table entry,
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the Register is read, its content is bitwise ANDed with AndMask, and then ORed
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with OrMask before being written back to the Register. The Super I/O driver
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must track the current state of the Super I/O and enable the configuration mode
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of Super I/O if necessary prior to table processing. Once the table is processed,
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the Super I/O device must be returned to the original state.
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@param This A pointer to this instance of the EFI_SIO_PPI.
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@param Command A pointer to an array of NumberOfCommands EFI_SIO_REGISTER_MODIFY
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structures. Each structure specifies a single Super I/O register
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modify operation.
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@param NumberOfCommands The number of elements in the Command array.
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@retval EFI_SUCCESS The operation completed successfully.
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@retval EFI_INVALID_PARAMETERS Command is NULL.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_SIO_REGISTER_MODIFY)(
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IN CONST EFI_SIO_PPI *This,
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IN CONST EFI_SIO_REGISTER_MODIFY *Command,
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IN UINTN NumberOfCommands
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);
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///
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/// Specifies the end of the information list.
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///
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#define EFI_ACPI_PNP_HID_END 0
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typedef UINT32 EFI_ACPI_HID;
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typedef UINT32 EFI_ACPI_UID;
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#pragma pack(1)
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typedef struct _EFI_SIO_INFO {
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EFI_ACPI_HID Hid;
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EFI_ACPI_UID Uid;
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UINT8 Ldn;
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} EFI_SIO_INFO, *PEFI_SIO_INFO;
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#pragma pack()
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///
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/// This PPI provides low-level access to Super I/O registers using Read() and
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/// Write(). It also uniquely identifies this Super I/O controller using a GUID
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/// and provides mappings between ACPI style PNP IDs and the logical device numbers.
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/// There is one instance of this PPI per Super I/O device.
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///
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struct _EFI_SIO_PPI {
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///
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/// This function reads a register's value from the Super I/O controller.
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///
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EFI_PEI_SIO_REGISTER_READ Read;
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///
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/// This function writes a value to a register in the Super I/O controller.
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///
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EFI_PEI_SIO_REGISTER_WRITE Write;
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///
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/// This function modifies zero or more registers in the Super I/O controller
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/// using a table.
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///
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EFI_PEI_SIO_REGISTER_MODIFY Modify;
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///
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/// This GUID uniquely identifies the Super I/O controller.
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///
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EFI_GUID SioGuid;
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///
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/// This pointer is to an array which maps EISA identifiers to logical devices numbers.
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///
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PEFI_SIO_INFO Info;
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};
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extern EFI_GUID gEfiSioPpiGuid;
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#endif
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@ -0,0 +1,116 @@
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/** @file
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ISA HC Protocol as defined in the PI 1.2.1 specification.
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This protocol provides registration for ISA devices on a positive- or
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subtractive-decode ISA bus. It allows devices to be registered and also
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handles opening and closing the apertures which are positively-decoded.
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Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
|
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which accompanies this distribution. The full text of the license may be found at
|
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http://opensource.org/licenses/bsd-license.php
|
||||
|
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@par Revision Reference:
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This protocol is from PI Version 1.2.1.
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**/
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#ifndef __ISA_HC_PROTOCOL_H__
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#define __ISA_HC_PROTOCOL_H__
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#define EFI_ISA_HC_PROTOCOL_GUID \
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{ \
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0xbcdaf080, 0x1bde, 0x4e22, {0xae, 0x6a, 0x43, 0x54, 0x1e, 0x12, 0x8e, 0xc4} \
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}
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#define EFI_ISA_HC_SERVICE_BINDING_PROTOCOL_GUID \
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{ \
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0xfad7933a, 0x6c21, 0x4234, {0xa4, 0x34, 0x0a, 0x8a, 0x0d, 0x2b, 0x07, 0x81} \
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}
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typedef struct _EFI_ISA_HC_PROTOCOL EFI_ISA_HC_PROTOCOL;
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typedef struct _EFI_ISA_HC_PROTOCOL *PEFI_ISA_HC_PROTOCOL;
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/**
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Open I/O aperture.
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This function opens an I/O aperture in a ISA Host Controller for the I/O addresses
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specified by IoAddress to IoAddress + IoLength - 1. It may be possible that a
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single hardware aperture may be used for more than one device. This function
|
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tracks the number of times that each aperture is referenced, and does not close
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the hardware aperture (via CloseIoAperture()) until there are no more references to it.
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@param This A pointer to this instance of the EFI_ISA_HC_PROTOCOL.
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@param IoAddress An unsigned integer that specifies the first byte of the
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I/O space required.
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@param IoLength An unsigned integer that specifies the number of bytes
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of the I/O space required.
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@param IoApertureHandle A pointer to the returned I/O aperture handle. This
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value can be used on subsequent calls to CloseIoAperture().
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@retval EFI_SUCCESS The I/O aperture was opened successfully.
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@retval EFI_UNSUPPORTED The ISA Host Controller is a subtractive-decode controller.
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@retval EFI_OUT_OF_RESOURCES There is no available I/O aperture.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_ISA_HC_OPEN_IO) (
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IN CONST EFI_ISA_HC_PROTOCOL *This,
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IN UINT16 IoAddress,
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IN UINT16 IoLength,
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OUT UINT64 *IoApertureHandle
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);
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/**
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Close I/O aperture.
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This function closes a previously opened I/O aperture handle. If there are no
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more I/O aperture handles that refer to the hardware I/O aperture resource,
|
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then the hardware I/O aperture is closed. It may be possible that a single
|
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hardware aperture may be used for more than one device. This function tracks
|
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the number of times that each aperture is referenced, and does not close the
|
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hardware aperture (via CloseIoAperture()) until there are no more references to it.
|
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|
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@param This A pointer to this instance of the EFI_ISA_HC_PROTOCOL.
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@param IoApertureHandle The I/O aperture handle previously returned from a
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call to OpenIoAperture().
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@retval EFI_SUCCESS The IO aperture was closed successfully.
|
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_ISA_HC_CLOSE_IO) (
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IN CONST EFI_ISA_HC_PROTOCOL *This,
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IN UINT64 IoApertureHandle
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);
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///
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/// ISA HC Protocol
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///
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struct _EFI_ISA_HC_PROTOCOL {
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///
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/// The version of this protocol. Higher version numbers are backward
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/// compatible with lower version numbers.
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///
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UINT32 Version;
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///
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/// Open an I/O aperture.
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///
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EFI_ISA_HC_OPEN_IO OpenIoAperture;
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///
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/// Close an I/O aperture.
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///
|
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EFI_ISA_HC_CLOSE_IO CloseIoAperture;
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};
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|
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///
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/// Reference to variable defined in the .DEC file
|
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///
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extern EFI_GUID gEfiIsaHcProtocolGuid;
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extern EFI_GUID gEfiIsaHcServiceBindingProtocolGuid;
|
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|
||||
#endif // __ISA_HC_H__
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|
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@ -0,0 +1,92 @@
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/** @file
|
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The Super I/O Control Protocol is installed by the Super I/O driver. It provides
|
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the low-level services for SIO devices that enable them to be used in the UEFI
|
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driver model.
|
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|
||||
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
@par Revision Reference:
|
||||
This protocol is from PI Version 1.2.1.
|
||||
|
||||
**/
|
||||
|
||||
#ifndef __EFI_SUPER_IO_CONTROL_PROTOCOL_H__
|
||||
#define __EFI_SUPER_IO_CONTROL_PROTOCOL_H__
|
||||
|
||||
#define EFI_SIO_CONTROL_PROTOCOL_GUID \
|
||||
{ \
|
||||
0xb91978df, 0x9fc1, 0x427d, { 0xbb, 0x5, 0x4c, 0x82, 0x84, 0x55, 0xca, 0x27 } \
|
||||
}
|
||||
|
||||
typedef struct _EFI_SIO_CONTROL_PROTOCOL EFI_SIO_CONTROL_PROTOCOL;
|
||||
typedef struct _EFI_SIO_CONTROL_PROTOCOL *PEFI_SIO_CONTROL_PROTOCOL;
|
||||
|
||||
/**
|
||||
Enable an ISA-style device.
|
||||
|
||||
This function enables a logical ISA device and, if necessary, configures it
|
||||
to default settings, including memory, I/O, DMA and IRQ resources.
|
||||
|
||||
@param This A pointer to this instance of the EFI_SIO_CONTROL_PROTOCOL.
|
||||
|
||||
@retval EFI_SUCCESS The device is enabled successfully.
|
||||
@retval EFI_OUT_OF_RESOURCES The device could not be enabled because there
|
||||
were insufficient resources either for the device
|
||||
itself or for the records needed to track the device.
|
||||
@retval EFI_ALREADY_STARTED The device is already enabled.
|
||||
@retval EFI_UNSUPPORTED The device cannot be enabled.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *EFI_SIO_CONTROL_ENABLE)(
|
||||
IN CONST EFI_SIO_CONTROL_PROTOCOL *This
|
||||
);
|
||||
|
||||
/**
|
||||
Disable a logical ISA device.
|
||||
|
||||
This function disables a logical ISA device so that it no longer consumes
|
||||
system resources, such as memory, I/O, DMA and IRQ resources. Enough information
|
||||
must be available so that subsequent Enable() calls would properly reconfigure
|
||||
the device.
|
||||
|
||||
@param This A pointer to this instance of the EFI_SIO_CONTROL_PROTOCOL.
|
||||
|
||||
@retval EFI_SUCCESS The device is disabled successfully.
|
||||
@retval EFI_OUT_OF_RESOURCES The device could not be disabled because there
|
||||
were insufficient resources either for the device
|
||||
itself or for the records needed to track the device.
|
||||
@retval EFI_ALREADY_STARTED The device is already disabled.
|
||||
@retval EFI_UNSUPPORTED The device cannot be disabled.
|
||||
**/
|
||||
typedef
|
||||
EFI_STATUS
|
||||
(EFIAPI *EFI_SIO_CONTROL_DISABLE)(
|
||||
IN CONST EFI_SIO_CONTROL_PROTOCOL *This
|
||||
);
|
||||
|
||||
struct _EFI_SIO_CONTROL_PROTOCOL {
|
||||
///
|
||||
/// The version of this protocol.
|
||||
///
|
||||
UINT32 Version;
|
||||
///
|
||||
/// Enable a device.
|
||||
///
|
||||
EFI_SIO_CONTROL_ENABLE EnableDevice;
|
||||
///
|
||||
/// Disable a device.
|
||||
///
|
||||
EFI_SIO_CONTROL_DISABLE DisableDevice;
|
||||
};
|
||||
|
||||
extern EFI_GUID gEfiSioControlProtocolGuid;
|
||||
|
||||
#endif // __EFI_SUPER_IO_CONTROL_PROTOCOL_H__
|
||||
|
|
@ -811,6 +811,12 @@
|
|||
## Include/Ppi/VectorHandoffInfo.h
|
||||
gEfiVectorHandoffInfoPpiGuid = { 0x3cd652b4, 0x6d33, 0x4dce, { 0x89, 0xdb, 0x83, 0xdf, 0x97, 0x66, 0xfc, 0xca }}
|
||||
|
||||
## Include/Ppi/IsaHc.h
|
||||
gEfiIsaHcPpiGuid = { 0x8d48bd70, 0xc8a3, 0x4c06, {0x90, 0x1b, 0x74, 0x79, 0x46, 0xaa, 0xc3, 0x58 } }
|
||||
|
||||
## Include/Ppi/SuperIo.h
|
||||
gEfiSioPpiGuid = { 0x23a464ad, 0xcb83, 0x48b8, {0x94, 0xab, 0x1a, 0x6f, 0xef, 0xcf, 0xe5, 0x22 } }
|
||||
|
||||
#
|
||||
# PPIs defined in PI 1.3.
|
||||
#
|
||||
|
|
@ -1067,6 +1073,13 @@
|
|||
## Include/Protocol/SmmEndOfDxe.h
|
||||
gEfiSmmEndOfDxeProtocolGuid = { 0x24e70042, 0xd5c5, 0x4260, { 0x8c, 0x39, 0xa, 0xd3, 0xaa, 0x32, 0xe9, 0x3d }}
|
||||
|
||||
## Include/Protocol/IsaHc.h
|
||||
gEfiIsaHcProtocolGuid = { 0xbcdaf080, 0x1bde, 0x4e22, {0xae, 0x6a, 0x43, 0x54, 0x1e, 0x12, 0x8e, 0xc4 } }
|
||||
gEfiIsaHcServiceBindingProtocolGuid = { 0xfad7933a, 0x6c21, 0x4234, {0xa4, 0x34, 0x0a, 0x8a, 0x0d, 0x2b, 0x07, 0x81 } }
|
||||
|
||||
## Include/Protocol/SuperIoControl.h
|
||||
gEfiSioControlProtocolGuid = { 0xb91978df, 0x9fc1, 0x427d, { 0xbb, 0x5, 0x4c, 0x82, 0x84, 0x55, 0xca, 0x27 } }
|
||||
|
||||
## Include/Protocol/PiPcdInfo.h
|
||||
gEfiGetPcdInfoProtocolGuid = { 0xfd0f4478, 0xefd, 0x461d, { 0xba, 0x2d, 0xe5, 0x8c, 0x45, 0xfd, 0x5f, 0x5e } }
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue