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MdePkg: Add SIO related protocol/PPI definitions. 

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17503 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ruiyu Ni 2015-05-26 02:44:27 +00:00 committed by niruiyu
parent e6dce6443d
commit 42c9d9f8a3
5 changed files with 523 additions and 0 deletions
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119
Include/Ppi/IsaHc.h Normal file
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/** @file
This PPI opens or closes an I/O aperture in a ISA HOST controller.
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@par Revision Reference:
This PPI is from PI Version 1.2.1.
**/
#ifndef __ISA_HC_PPI_H__
#define __ISA_HC_PPI_H__
#define EFI_ISA_HC_PPI_GUID \
{ \
0x8d48bd70, 0xc8a3, 0x4c06, {0x90, 0x1b, 0x74, 0x79, 0x46, 0xaa, 0xc3, 0x58} \
}
typedef struct _EFI_ISA_HC_PPI EFI_ISA_HC_PPI;
typedef struct _EFI_ISA_HC_PPI *PEFI_ISA_HC_PPI;
/**
Open I/O aperture.
This function opens an I/O aperture in a ISA Host Controller for the I/O
addresses specified by IoAddress to IoAddress + IoLength - 1. It is possible
that more than one caller may be assigned to the same aperture.
It may be possible that a single hardware aperture may be used for more than
one device. This function tracks the number of times that each aperture is
referenced, and doesa not close the hardware aperture (via CloseIoAperture())
until there are no more references to it.
@param This A pointer to this instance of the EFI_ISA_HC_PPI.
@param IoAddress An unsigned integer that specifies the first byte of
the I/O space required.
@param IoLength An unsigned integer that specifies the number of
bytes of the I/O space required.
@param IoApertureHandle A pointer to the returned I/O aperture handle.
This value can be used on subsequent calls to CloseIoAperture().
@retval EFI_SUCCESS The I/O aperture was opened successfully.
@retval EFI_UNSUPPORTED The ISA Host Controller is a subtractive-decode controller.
@retval EFI_OUT_OF_RESOURCES There is no available I/O aperture.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_PEI_ISA_HC_OPEN_IO) (
IN CONST EFI_ISA_HC_PPI *This,
IN UINT16 IoAddress,
IN UINT16 IoLength,
OUT UINT64 *IoApertureHandle
);
/**
Close I/O aperture.
This function closes a previously opened I/O aperture handle. If there are no
more I/O aperture handles that refer to the hardware I/O aperture resource,
then the hardware I/O aperture is closed.
It may be possible that a single hardware aperture may be used for more than
one device. This function tracks the number of times that each aperture is
referenced, and does not close the hardware aperture (via CloseIoAperture())
until there are no more references to it.
@param This A pointer to this instance of the EFI_ISA_HC_PPI.
@param IoApertureHandle The I/O aperture handle previously returned from a
call to OpenIoAperture().
@retval EFI_SUCCESS The I/O aperture was closed successfully.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_PEI_ISA_HC_CLOSE_IO) (
IN CONST EFI_ISA_HC_PPI *This,
IN UINT64 IoApertureHandle
);
///
/// This PPI provides functions for opening or closing an I/O aperture.
///
struct _EFI_ISA_HC_PPI {
///
/// An unsigned integer that specifies the version of the PPI structure.
///
UINT32 Version;
///
/// The address of the ISA/LPC Bridge device.
/// For PCI, this is the segment, bus, device and function of the a ISA/LPC
/// Bridge device.
///
/// If bits 24-31 are 0, then the definition is:
/// Bits 0:2 - Function
/// Bits 3-7 - Device
/// Bits 8:15 - Bus
/// Bits 16-23 - Segment
/// Bits 24-31 - Bus Type
/// If bits 24-31 are 0xff, then the definition is platform-specific.
///
UINT32 Address;
///
/// Opens an aperture on a positive-decode ISA Host Controller.
///
EFI_PEI_ISA_HC_OPEN_IO OpenIoAperture;
///
/// Closes an aperture on a positive-decode ISA Host Controller.
///
EFI_PEI_ISA_HC_CLOSE_IO CloseIoAperture;
};
extern EFI_GUID gEfiIsaHcPpiGuid;
#endif

183
Include/Ppi/SuperIo.h Normal file
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/** @file
This PPI provides the super I/O register access functionality.
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@par Revision Reference:
This PPI is from PI Version 1.2.1.
**/
#ifndef __EFI_SUPER_IO_PPI_H__
#define __EFI_SUPER_IO_PPI_H__
#include <Protocol/SuperIo.h>
#define EFI_SIO_PPI_GUID \
{ \
0x23a464ad, 0xcb83, 0x48b8, {0x94, 0xab, 0x1a, 0x6f, 0xef, 0xcf, 0xe5, 0x22} \
}
typedef struct _EFI_SIO_PPI EFI_SIO_PPI;
typedef struct _EFI_SIO_PPI *PEFI_SIO_PPI;
typedef UINT16 EFI_SIO_REGISTER;
#define EFI_SIO_REG(ldn,reg) (EFI_SIO_REGISTER) (((ldn) << 8) | reg)
#define EFI_SIO_LDN_GLOBAL 0xFF
/**
Read a Super I/O register.
The register is specified as an 8-bit logical device number and an 8-bit
register value. The logical device numbers for specific SIO devices can be
determined using the Info member of the PPI structure.
@param This A pointer to this instance of the EFI_SIO_PPI.
@param ExitCfgMode A boolean specifying whether the driver should turn on
configuration mode (FALSE) or turn off configuration mode
(TRUE) after completing the read operation. The driver must
track the current state of the configuration mode (if any)
and turn on configuration mode (if necessary) prior to
register access.
@param Register A value specifying the logical device number (bits 15:8)
and the register to read (bits 7:0). The logical device
number of EFI_SIO_LDN_GLOBAL indicates that global
registers will be used.
@param IoData A pointer to the returned register value.
@retval EFI_SUCCESS Success.
@regval EFI_TIMEOUT The register could not be read in the a reasonable
amount of time. The exact time is device-specific.
@retval EFI_INVALID_PARAMETERS Register was out of range for this device.
@retval EFI_INVALID_PARAMETERS IoData was NULL
@retval EFI_DEVICE_ERROR There was a device fault or the device was not present.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_PEI_SIO_REGISTER_READ)(
IN CONST EFI_SIO_PPI *This,
IN BOOLEAN ExitCfgMode,
IN EFI_SIO_REGISTER Register,
OUT UINT8 *IoData
);
/**
Write a Super I/O register.
The register is specified as an 8-bit logical device number and an 8-bit register
value. The logical device numbers for specific SIO devices can be determined
using the Info member of the PPI structure.
@param This A pointer to this instance of the EFI_SIO_PPI.
@param ExitCfgMode A boolean specifying whether the driver should turn on
configuration mode (FALSE) or turn off configuration mode
(TRUE) after completing the read operation. The driver must
track the current state of the configuration mode (if any)
and turn on configuration mode (if necessary) prior to
register access.
@param Register A value specifying the logical device number (bits 15:8)
and the register to read (bits 7:0). The logical device
number of EFI_SIO_LDN_GLOBAL indicates that global
registers will be used.
@param IoData A pointer to the returned register value.
@retval EFI_SUCCESS Success.
@regval EFI_TIMEOUT The register could not be read in the a reasonable
amount of time. The exact time is device-specific.
@retval EFI_INVALID_PARAMETERS Register was out of range for this device.
@retval EFI_INVALID_PARAMETERS IoData was NULL
@retval EFI_DEVICE_ERROR There was a device fault or the device was not present.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_PEI_SIO_REGISTER_WRITE)(
IN CONST EFI_SIO_PPI *This,
IN BOOLEAN ExitCfgMode,
IN EFI_SIO_REGISTER Register,
IN UINT8 IoData
);
/**
Provides an interface for a table based programming of the Super I/O registers.
The Modify() function provides an interface for table based programming of the
Super I/O registers. This function can be used to perform programming of
multiple Super I/O registers with a single function call. For each table entry,
the Register is read, its content is bitwise ANDed with AndMask, and then ORed
with OrMask before being written back to the Register. The Super I/O driver
must track the current state of the Super I/O and enable the configuration mode
of Super I/O if necessary prior to table processing. Once the table is processed,
the Super I/O device must be returned to the original state.
@param This A pointer to this instance of the EFI_SIO_PPI.
@param Command A pointer to an array of NumberOfCommands EFI_SIO_REGISTER_MODIFY
structures. Each structure specifies a single Super I/O register
modify operation.
@param NumberOfCommands The number of elements in the Command array.
@retval EFI_SUCCESS The operation completed successfully.
@retval EFI_INVALID_PARAMETERS Command is NULL.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_PEI_SIO_REGISTER_MODIFY)(
IN CONST EFI_SIO_PPI *This,
IN CONST EFI_SIO_REGISTER_MODIFY *Command,
IN UINTN NumberOfCommands
);
///
/// Specifies the end of the information list.
///
#define EFI_ACPI_PNP_HID_END 0
typedef UINT32 EFI_ACPI_HID;
typedef UINT32 EFI_ACPI_UID;
#pragma pack(1)
typedef struct _EFI_SIO_INFO {
EFI_ACPI_HID Hid;
EFI_ACPI_UID Uid;
UINT8 Ldn;
} EFI_SIO_INFO, *PEFI_SIO_INFO;
#pragma pack()
///
/// This PPI provides low-level access to Super I/O registers using Read() and
/// Write(). It also uniquely identifies this Super I/O controller using a GUID
/// and provides mappings between ACPI style PNP IDs and the logical device numbers.
/// There is one instance of this PPI per Super I/O device.
///
struct _EFI_SIO_PPI {
///
/// This function reads a register's value from the Super I/O controller.
///
EFI_PEI_SIO_REGISTER_READ Read;
///
/// This function writes a value to a register in the Super I/O controller.
///
EFI_PEI_SIO_REGISTER_WRITE Write;
///
/// This function modifies zero or more registers in the Super I/O controller
/// using a table.
///
EFI_PEI_SIO_REGISTER_MODIFY Modify;
///
/// This GUID uniquely identifies the Super I/O controller.
///
EFI_GUID SioGuid;
///
/// This pointer is to an array which maps EISA identifiers to logical devices numbers.
///
PEFI_SIO_INFO Info;
};
extern EFI_GUID gEfiSioPpiGuid;
#endif

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Include/Protocol/IsaHc.h Normal file
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/** @file
ISA HC Protocol as defined in the PI 1.2.1 specification.
This protocol provides registration for ISA devices on a positive- or
subtractive-decode ISA bus. It allows devices to be registered and also
handles opening and closing the apertures which are positively-decoded.
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@par Revision Reference:
This protocol is from PI Version 1.2.1.
**/
#ifndef __ISA_HC_PROTOCOL_H__
#define __ISA_HC_PROTOCOL_H__
#define EFI_ISA_HC_PROTOCOL_GUID \
{ \
0xbcdaf080, 0x1bde, 0x4e22, {0xae, 0x6a, 0x43, 0x54, 0x1e, 0x12, 0x8e, 0xc4} \
}
#define EFI_ISA_HC_SERVICE_BINDING_PROTOCOL_GUID \
{ \
0xfad7933a, 0x6c21, 0x4234, {0xa4, 0x34, 0x0a, 0x8a, 0x0d, 0x2b, 0x07, 0x81} \
}
typedef struct _EFI_ISA_HC_PROTOCOL EFI_ISA_HC_PROTOCOL;
typedef struct _EFI_ISA_HC_PROTOCOL *PEFI_ISA_HC_PROTOCOL;
/**
Open I/O aperture.
This function opens an I/O aperture in a ISA Host Controller for the I/O addresses
specified by IoAddress to IoAddress + IoLength - 1. It may be possible that a
single hardware aperture may be used for more than one device. This function
tracks the number of times that each aperture is referenced, and does not close
the hardware aperture (via CloseIoAperture()) until there are no more references to it.
@param This A pointer to this instance of the EFI_ISA_HC_PROTOCOL.
@param IoAddress An unsigned integer that specifies the first byte of the
I/O space required.
@param IoLength An unsigned integer that specifies the number of bytes
of the I/O space required.
@param IoApertureHandle A pointer to the returned I/O aperture handle. This
value can be used on subsequent calls to CloseIoAperture().
@retval EFI_SUCCESS The I/O aperture was opened successfully.
@retval EFI_UNSUPPORTED The ISA Host Controller is a subtractive-decode controller.
@retval EFI_OUT_OF_RESOURCES There is no available I/O aperture.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_ISA_HC_OPEN_IO) (
IN CONST EFI_ISA_HC_PROTOCOL *This,
IN UINT16 IoAddress,
IN UINT16 IoLength,
OUT UINT64 *IoApertureHandle
);
/**
Close I/O aperture.
This function closes a previously opened I/O aperture handle. If there are no
more I/O aperture handles that refer to the hardware I/O aperture resource,
then the hardware I/O aperture is closed. It may be possible that a single
hardware aperture may be used for more than one device. This function tracks
the number of times that each aperture is referenced, and does not close the
hardware aperture (via CloseIoAperture()) until there are no more references to it.
@param This A pointer to this instance of the EFI_ISA_HC_PROTOCOL.
@param IoApertureHandle The I/O aperture handle previously returned from a
call to OpenIoAperture().
@retval EFI_SUCCESS The IO aperture was closed successfully.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_ISA_HC_CLOSE_IO) (
IN CONST EFI_ISA_HC_PROTOCOL *This,
IN UINT64 IoApertureHandle
);
///
/// ISA HC Protocol
///
struct _EFI_ISA_HC_PROTOCOL {
///
/// The version of this protocol. Higher version numbers are backward
/// compatible with lower version numbers.
///
UINT32 Version;
///
/// Open an I/O aperture.
///
EFI_ISA_HC_OPEN_IO OpenIoAperture;
///
/// Close an I/O aperture.
///
EFI_ISA_HC_CLOSE_IO CloseIoAperture;
};
///
/// Reference to variable defined in the .DEC file
///
extern EFI_GUID gEfiIsaHcProtocolGuid;
extern EFI_GUID gEfiIsaHcServiceBindingProtocolGuid;
#endif // __ISA_HC_H__

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Include/Protocol/SuperIoControl.h Normal file
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/** @file
The Super I/O Control Protocol is installed by the Super I/O driver. It provides
the low-level services for SIO devices that enable them to be used in the UEFI
driver model.
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@par Revision Reference:
This protocol is from PI Version 1.2.1.
**/
#ifndef __EFI_SUPER_IO_CONTROL_PROTOCOL_H__
#define __EFI_SUPER_IO_CONTROL_PROTOCOL_H__
#define EFI_SIO_CONTROL_PROTOCOL_GUID \
{ \
0xb91978df, 0x9fc1, 0x427d, { 0xbb, 0x5, 0x4c, 0x82, 0x84, 0x55, 0xca, 0x27 } \
}
typedef struct _EFI_SIO_CONTROL_PROTOCOL EFI_SIO_CONTROL_PROTOCOL;
typedef struct _EFI_SIO_CONTROL_PROTOCOL *PEFI_SIO_CONTROL_PROTOCOL;
/**
Enable an ISA-style device.
This function enables a logical ISA device and, if necessary, configures it
to default settings, including memory, I/O, DMA and IRQ resources.
@param This A pointer to this instance of the EFI_SIO_CONTROL_PROTOCOL.
@retval EFI_SUCCESS The device is enabled successfully.
@retval EFI_OUT_OF_RESOURCES The device could not be enabled because there
were insufficient resources either for the device
itself or for the records needed to track the device.
@retval EFI_ALREADY_STARTED The device is already enabled.
@retval EFI_UNSUPPORTED The device cannot be enabled.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_SIO_CONTROL_ENABLE)(
IN CONST EFI_SIO_CONTROL_PROTOCOL *This
);
/**
Disable a logical ISA device.
This function disables a logical ISA device so that it no longer consumes
system resources, such as memory, I/O, DMA and IRQ resources. Enough information
must be available so that subsequent Enable() calls would properly reconfigure
the device.
@param This A pointer to this instance of the EFI_SIO_CONTROL_PROTOCOL.
@retval EFI_SUCCESS The device is disabled successfully.
@retval EFI_OUT_OF_RESOURCES The device could not be disabled because there
were insufficient resources either for the device
itself or for the records needed to track the device.
@retval EFI_ALREADY_STARTED The device is already disabled.
@retval EFI_UNSUPPORTED The device cannot be disabled.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_SIO_CONTROL_DISABLE)(
IN CONST EFI_SIO_CONTROL_PROTOCOL *This
);
struct _EFI_SIO_CONTROL_PROTOCOL {
///
/// The version of this protocol.
///
UINT32 Version;
///
/// Enable a device.
///
EFI_SIO_CONTROL_ENABLE EnableDevice;
///
/// Disable a device.
///
EFI_SIO_CONTROL_DISABLE DisableDevice;
};
extern EFI_GUID gEfiSioControlProtocolGuid;
#endif // __EFI_SUPER_IO_CONTROL_PROTOCOL_H__

13
MdePkg/MdePkg.dec
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@ -811,6 +811,12 @@
## Include/Ppi/VectorHandoffInfo.h ## Include/Ppi/VectorHandoffInfo.h
gEfiVectorHandoffInfoPpiGuid = { 0x3cd652b4, 0x6d33, 0x4dce, { 0x89, 0xdb, 0x83, 0xdf, 0x97, 0x66, 0xfc, 0xca }} gEfiVectorHandoffInfoPpiGuid = { 0x3cd652b4, 0x6d33, 0x4dce, { 0x89, 0xdb, 0x83, 0xdf, 0x97, 0x66, 0xfc, 0xca }}
## Include/Ppi/IsaHc.h
gEfiIsaHcPpiGuid = { 0x8d48bd70, 0xc8a3, 0x4c06, {0x90, 0x1b, 0x74, 0x79, 0x46, 0xaa, 0xc3, 0x58 } }
## Include/Ppi/SuperIo.h
gEfiSioPpiGuid = { 0x23a464ad, 0xcb83, 0x48b8, {0x94, 0xab, 0x1a, 0x6f, 0xef, 0xcf, 0xe5, 0x22 } }
# #
# PPIs defined in PI 1.3. # PPIs defined in PI 1.3.
# #
@ -1067,6 +1073,13 @@
## Include/Protocol/SmmEndOfDxe.h ## Include/Protocol/SmmEndOfDxe.h
gEfiSmmEndOfDxeProtocolGuid = { 0x24e70042, 0xd5c5, 0x4260, { 0x8c, 0x39, 0xa, 0xd3, 0xaa, 0x32, 0xe9, 0x3d }} gEfiSmmEndOfDxeProtocolGuid = { 0x24e70042, 0xd5c5, 0x4260, { 0x8c, 0x39, 0xa, 0xd3, 0xaa, 0x32, 0xe9, 0x3d }}
## Include/Protocol/IsaHc.h
gEfiIsaHcProtocolGuid = { 0xbcdaf080, 0x1bde, 0x4e22, {0xae, 0x6a, 0x43, 0x54, 0x1e, 0x12, 0x8e, 0xc4 } }
gEfiIsaHcServiceBindingProtocolGuid = { 0xfad7933a, 0x6c21, 0x4234, {0xa4, 0x34, 0x0a, 0x8a, 0x0d, 0x2b, 0x07, 0x81 } }
## Include/Protocol/SuperIoControl.h
gEfiSioControlProtocolGuid = { 0xb91978df, 0x9fc1, 0x427d, { 0xbb, 0x5, 0x4c, 0x82, 0x84, 0x55, 0xca, 0x27 } }
## Include/Protocol/PiPcdInfo.h ## Include/Protocol/PiPcdInfo.h
gEfiGetPcdInfoProtocolGuid = { 0xfd0f4478, 0xefd, 0x461d, { 0xba, 0x2d, 0xe5, 0x8c, 0x45, 0xfd, 0x5f, 0x5e } } gEfiGetPcdInfoProtocolGuid = { 0xfd0f4478, 0xefd, 0x461d, { 0xba, 0x2d, 0xe5, 0x8c, 0x45, 0xfd, 0x5f, 0x5e } }