mirror of https://github.com/acidanthera/audk.git
ShellPkg SmbiosView: Add decoding of SMBIOS spec 3.1.0
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=340
The decoding of TPM Device (Type 43) has been added at
e9f0be021b
.
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
This commit is contained in:
parent
e1108d9735
commit
44175ee77f
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@ -335,7 +335,17 @@ SmbiosPrintStructure (
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PRINT_STRUCT_VALUE (Struct, Type0, EmbeddedControllerFirmwareMajorRelease);
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PRINT_STRUCT_VALUE (Struct, Type0, EmbeddedControllerFirmwareMinorRelease);
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}
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if (AE_SMBIOS_VERSION (0x3, 0x1) && (Struct->Hdr->Length > 0x18)) {
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ShellPrintHiiEx (
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-1,
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-1,
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NULL,
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STRING_TOKEN (STR_SMBIOSVIEW_PRINTINFO_EXTENDED_BIOS_SIZE),
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gShellDebug1HiiHandle,
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Struct->Type0->ExtendedBiosSize.Size,
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(Struct->Type0->ExtendedBiosSize.Unit == 0x0) ? L"MB": L"GB"
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);
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}
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break;
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//
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@ -510,6 +520,10 @@ SmbiosPrintStructure (
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DisplayCacheErrCorrectingType (Struct->Type7->ErrorCorrectionType, Option);
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DisplayCacheSystemCacheType (Struct->Type7->SystemCacheType, Option);
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DisplayCacheAssociativity (Struct->Type7->Associativity, Option);
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if (AE_SMBIOS_VERSION (0x3, 0x1) && (Struct->Hdr->Length > 0x13)) {
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PRINT_STRUCT_VALUE_H (Struct, Type7, MaximumCacheSize2);
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PRINT_STRUCT_VALUE_H (Struct, Type7, InstalledSize2);
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}
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break;
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//
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@ -1584,6 +1598,18 @@ DisplayProcessorFamily (
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Print (L"Intel(R) Core(TM) M processor\n");
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break;
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case 0x2D:
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Print (L"Intel(R) Core(TM) m3 processor\n");
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break;
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case 0x2E:
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Print (L"Intel(R) Core(TM) m5 processor\n");
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break;
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case 0x2F:
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Print (L"Intel(R) Core(TM) m7 processor\n");
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break;
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case 0x30:
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ShellPrintHiiEx(-1,-1,NULL,STRING_TOKEN (STR_SMBIOSVIEW_PRINTINFO_ALPHA_FAMILY_2), gShellDebug1HiiHandle);
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break;
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@ -1784,6 +1810,14 @@ DisplayProcessorFamily (
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Print (L"AMD Opteron(TM) X2000 Series APU\n");
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break;
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case 0x69:
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Print (L"AMD Opteron(TM) A-Series Processor\n");
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break;
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case 0x6A:
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Print (L"AMD Opteron(TM) X3000 Series APU\n");
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break;
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case 0x70:
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ShellPrintHiiEx(-1,-1,NULL,STRING_TOKEN (STR_SMBIOSVIEW_PRINTINFO_HOBBIT_FAMILY), gShellDebug1HiiHandle);
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break;
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@ -2215,6 +2249,14 @@ DisplayProcessorFamily2 (
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// Use switch to check
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//
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switch (Family2) {
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case 0x100:
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Print (L"ARMv7\n");
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break;
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case 0x101:
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Print (L"ARMv8\n");
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break;
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case 0x104:
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Print (L"SH-3\n");
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break;
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@ -260,6 +260,22 @@ TABLE_ITEM SystemEnclosureTypeTable[] = {
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0x20,
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L" Detachable"
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},
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{
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0x21,
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L" IoT Gateway"
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},
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{
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0x22,
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L" Embedded PC"
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},
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{
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0x23,
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L" Mini PC"
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},
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{
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0x24,
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L" Stick PC"
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},
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};
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TABLE_ITEM SystemEnclosureStatusTable[] = {
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@ -531,6 +547,34 @@ TABLE_ITEM ProcessorUpgradeTable[] = {
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{
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0x30,
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L"Socket BGA1364"
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},
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{
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0x31,
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L"Socket AM4"
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},
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{
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0x32,
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L"Socket LGA1151"
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},
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{
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0x33,
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L"Socket BGA1356"
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},
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{
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0x34,
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L"Socket BGA1440"
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},
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{
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0x35,
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L"Socket BGA1515"
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},
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{
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0x36,
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L"Socket LGA3647-1"
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},
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{
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0x37,
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L"Socket SP3"
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}
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};
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@ -1346,6 +1390,18 @@ TABLE_ITEM SystemSlotTypeTable[] = {
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0x20,
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L"PCI Express Gen 3 SFF-8639"
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},
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{
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0x21,
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L"PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs"
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},
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{
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0x22,
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L"PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs"
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},
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{
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0x23,
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L"PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card"
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},
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{
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0xA0,
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L"PC-98/C20 "
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@ -380,6 +380,7 @@
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#string STR_SMBIOSVIEW_PRINTINFO_POWER_SUPPLY_REPLACE #language en-US "Power supply is hot replaceable\r\n"
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#string STR_SMBIOSVIEW_PRINTINFO_POWER_SUPPLY_NOT_REPLACE #language en-US "Power supply is not hot replaceable\r\n"
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#string STR_SMBIOSVIEW_PRINTINFO_BIOS_SIZE #language en-US "BiosSize: %d KB\r\n"
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#string STR_SMBIOSVIEW_PRINTINFO_EXTENDED_BIOS_SIZE #language en-US "ExtendedBiosSize: %d %s\r\n"
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#string STR_SMBIOSVIEW_QUERYTABLE_NO_INFO #language en-US "No Info"
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#string STR_SMBIOSVIEW_QUERYTABLE_RSVD_BITS_SET #language en-US "\r\nIt also has reserved bits set 1 --- reserved bits: 0x%x"
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#string STR_SMBIOSVIEW_QUERYTABLE_SYSTEM_WAKEUP_TYPE #language en-US "System Wakeup Type:"
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@ -1,6 +1,6 @@
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// /**
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//
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// Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
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// Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
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// (C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.<BR>
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// (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
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// This program and the accompanying materials
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@ -999,6 +999,7 @@
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" 40 - Additional Information\r\n"
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" 41 - Onboard Devices Extended Information\r\n"
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" 42 - Management Controller Host Interface\r\n"
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" 43 - TPM Device\r\n"
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" 2. Enter the SmbiosHandle parameter in hexadecimal format.\r\n"
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" Do not use the '0x' prefix format for hexadecimal values.\r\n"
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" 3. Internal commands:\r\n"
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