mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg/ArmPlatformLib: Introduce ArmPlatformSecBootAction function
This function is called at the initial stage of the Secure boot process to allow platform vendors to add early actions. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12413 6f19259b-4bc3-4df7-8a09-765794883524
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@ -20,8 +20,21 @@
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.align 3
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.align 3
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GCC_ASM_EXPORT(ArmPlatformSecBootAction)
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GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)
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GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)
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/**
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Call at the beginning of the platform boot up
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This function allows the firmware platform to do extra actions at the early
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stage of the platform power up.
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Note: This function must be implemented in assembler as there is no stack set up yet
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**/
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ASM_PFX(ArmPlatformSecBootAction):
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bx lr
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/**
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/**
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Initialize the memory where the initial stacks will reside
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Initialize the memory where the initial stacks will reside
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@ -19,11 +19,24 @@
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INCLUDE AsmMacroIoLib.inc
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INCLUDE AsmMacroIoLib.inc
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EXPORT ArmPlatformSecBootAction
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EXPORT ArmPlatformInitializeBootMemory
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EXPORT ArmPlatformInitializeBootMemory
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PRESERVE8
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PRESERVE8
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AREA CTA9x4BootMode, CODE, READONLY
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AREA CTA9x4BootMode, CODE, READONLY
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/**
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Call at the beginning of the platform boot up
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This function allows the firmware platform to do extra actions at the early
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stage of the platform power up.
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Note: This function must be implemented in assembler as there is no stack set up yet
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**/
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ArmPlatformSecBootAction
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bx lr
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/**
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/**
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Initialize the memory where the initial stacks will reside
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Initialize the memory where the initial stacks will reside
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@ -21,6 +21,7 @@
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.text
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.align 3
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.align 3
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GCC_ASM_EXPORT(ArmPlatformSecBootAction)
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GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)
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GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)
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GCC_ASM_IMPORT(PL35xSmcInitialize)
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GCC_ASM_IMPORT(PL35xSmcInitialize)
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@ -59,6 +60,18 @@ VersatileExpressSmcConfiguration:
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.word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC
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.word PL350_SMC_SET_OPMODE_MEM_WIDTH_32 | PL350_SMC_SET_OPMODE_SET_RD_SYNC | PL350_SMC_SET_OPMODE_SET_WR_SYNC
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VersatileExpressSmcConfigurationEnd:
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VersatileExpressSmcConfigurationEnd:
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/**
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Call at the beginning of the platform boot up
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This function allows the firmware platform to do extra actions at the early
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stage of the platform power up.
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Note: This function must be implemented in assembler as there is no stack set up yet
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**/
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ASM_PFX(ArmPlatformSecBootAction):
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bx lr
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/**
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/**
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Initialize the memory where the initial stacks will reside
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Initialize the memory where the initial stacks will reside
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@ -20,6 +20,7 @@
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INCLUDE AsmMacroIoLib.inc
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INCLUDE AsmMacroIoLib.inc
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EXPORT ArmPlatformSecBootAction
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EXPORT ArmPlatformInitializeBootMemory
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EXPORT ArmPlatformInitializeBootMemory
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IMPORT PL35xSmcInitialize
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IMPORT PL35xSmcInitialize
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@ -61,6 +62,18 @@ VersatileExpressSmcConfiguration
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
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VersatileExpressSmcConfigurationEnd
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VersatileExpressSmcConfigurationEnd
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/**
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Call at the beginning of the platform boot up
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This function allows the firmware platform to do extra actions at the early
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stage of the platform power up.
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Note: This function must be implemented in assembler as there is no stack set up yet
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**/
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ArmPlatformSecBootAction
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bx lr
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/**
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/**
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Initialize the memory where the initial stacks will reside
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Initialize the memory where the initial stacks will reside
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@ -82,6 +82,20 @@ ArmPlatformGetBootMode (
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VOID
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VOID
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);
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);
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/**
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Call at the beginning of the platform boot up
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This function allows the firmware platform to do extra actions at the early
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stage of the platform power up.
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Note: This function must be implemented in assembler as there is no stack set up yet
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**/
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VOID
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ArmPlatformSecBootAction (
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VOID
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);
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/**
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/**
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Initialize controllers that must setup at the early stage
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Initialize controllers that must setup at the early stage
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@ -30,6 +30,7 @@ GCC_ASM_EXPORT(_ModuleEntryPoint)
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#global functions referenced by this module
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#global functions referenced by this module
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GCC_ASM_IMPORT(CEntryPoint)
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GCC_ASM_IMPORT(CEntryPoint)
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GCC_ASM_IMPORT(ArmPlatformSecBootAction)
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GCC_ASM_IMPORT(ArmPlatformIsMemoryInitialized)
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GCC_ASM_IMPORT(ArmPlatformIsMemoryInitialized)
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GCC_ASM_IMPORT(ArmPlatformInitializeBootMemory)
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GCC_ASM_IMPORT(ArmPlatformInitializeBootMemory)
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GCC_ASM_IMPORT(ArmDisableInterrupts)
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GCC_ASM_IMPORT(ArmDisableInterrupts)
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@ -46,16 +47,19 @@ StartupAddr: .word ASM_PFX(CEntryPoint)
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SecVectorTableAddr: .word ASM_PFX(SecVectorTable)
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SecVectorTableAddr: .word ASM_PFX(SecVectorTable)
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ASM_PFX(_ModuleEntryPoint):
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ASM_PFX(_ModuleEntryPoint):
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#Set VBAR to the start of the exception vectors in Secure Mode
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ldr r0, SecVectorTableAddr
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bl ASM_PFX(ArmWriteVBar)
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# First ensure all interrupts are disabled
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# First ensure all interrupts are disabled
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bl ASM_PFX(ArmDisableInterrupts)
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bl ASM_PFX(ArmDisableInterrupts)
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# Ensure that the MMU and caches are off
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# Ensure that the MMU and caches are off
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bl ASM_PFX(ArmDisableCachesAndMmu)
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bl ASM_PFX(ArmDisableCachesAndMmu)
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# Jump to Platform Specific Boot Action function
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blx ASM_PFX(ArmPlatformSecBootAction)
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# Set VBAR to the start of the exception vectors in Secure Mode
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ldr r0, =SecVectorTable
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bl ASM_PFX(ArmWriteVBar)
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_IdentifyCpu:
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_IdentifyCpu:
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# Identify CPU ID
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# Identify CPU ID
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bl ASM_PFX(ArmReadMpidr)
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bl ASM_PFX(ArmReadMpidr)
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@ -20,6 +20,7 @@
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INCLUDE AsmMacroIoLib.inc
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INCLUDE AsmMacroIoLib.inc
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IMPORT CEntryPoint
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IMPORT CEntryPoint
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IMPORT ArmPlatformSecBootAction
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IMPORT ArmPlatformIsMemoryInitialized
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IMPORT ArmPlatformIsMemoryInitialized
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IMPORT ArmPlatformInitializeBootMemory
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IMPORT ArmPlatformInitializeBootMemory
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IMPORT ArmDisableInterrupts
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IMPORT ArmDisableInterrupts
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StartupAddr DCD CEntryPoint
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StartupAddr DCD CEntryPoint
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_ModuleEntryPoint
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_ModuleEntryPoint
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//Set VBAR to the start of the exception vectors in Secure Mode
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ldr r0, =SecVectorTable
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blx ArmWriteVBar
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// First ensure all interrupts are disabled
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// First ensure all interrupts are disabled
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blx ArmDisableInterrupts
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blx ArmDisableInterrupts
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// Ensure that the MMU and caches are off
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// Ensure that the MMU and caches are off
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blx ArmDisableCachesAndMmu
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blx ArmDisableCachesAndMmu
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// Jump to Platform Specific Boot Action function
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blx ArmPlatformSecBootAction
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// Set VBAR to the start of the exception vectors in Secure Mode
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ldr r0, =SecVectorTable
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blx ArmWriteVBar
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_IdentifyCpu
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_IdentifyCpu
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// Identify CPU ID
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// Identify CPU ID
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bl ArmReadMpidr
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bl ArmReadMpidr
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