mirror of https://github.com/acidanthera/audk.git
MdePkg BaseLib: Convert X64/DisablePaging64.asm to NASM
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/DisablePaging64.asm to X64/DisablePaging64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
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@ -463,6 +463,7 @@
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X64/Invd.asm | MSFT
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X64/Invd.asm | MSFT
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X64/Wbinvd.nasm| MSFT
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X64/Wbinvd.nasm| MSFT
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X64/Wbinvd.asm | MSFT
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X64/Wbinvd.asm | MSFT
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X64/DisablePaging64.nasm| MSFT
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X64/DisablePaging64.asm | MSFT
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X64/DisablePaging64.asm | MSFT
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X64/Mwait.asm | MSFT
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X64/Mwait.asm | MSFT
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X64/Monitor.asm | MSFT
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X64/Monitor.asm | MSFT
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@ -544,6 +545,7 @@
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X64/Invd.asm | INTEL
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X64/Invd.asm | INTEL
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X64/Wbinvd.nasm| INTEL
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X64/Wbinvd.nasm| INTEL
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X64/Wbinvd.asm | INTEL
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X64/Wbinvd.asm | INTEL
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X64/DisablePaging64.nasm| INTEL
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X64/DisablePaging64.asm | INTEL
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X64/DisablePaging64.asm | INTEL
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X64/Mwait.asm | INTEL
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X64/Mwait.asm | INTEL
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X64/Monitor.asm | INTEL
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X64/Monitor.asm | INTEL
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@ -634,6 +636,7 @@
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X64/LongJump.S | GCC
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X64/LongJump.S | GCC
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X64/EnableDisableInterrupts.nasm| GCC
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X64/EnableDisableInterrupts.nasm| GCC
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X64/EnableDisableInterrupts.S | GCC
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X64/EnableDisableInterrupts.S | GCC
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X64/DisablePaging64.nasm| GCC
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X64/DisablePaging64.S | GCC
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X64/DisablePaging64.S | GCC
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X64/CpuId.nasm| GCC
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X64/CpuId.nasm| GCC
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X64/CpuId.S | GCC
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X64/CpuId.S | GCC
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@ -0,0 +1,84 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; DisablePaging64.Asm
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;
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; Abstract:
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;
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; AsmDisablePaging64 function
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;
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; Notes:
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;
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;------------------------------------------------------------------------------
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DEFAULT REL
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SECTION .text
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; InternalX86DisablePaging64 (
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; IN UINT16 Cs,
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; IN UINT32 EntryPoint,
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; IN UINT32 Context1, OPTIONAL
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; IN UINT32 Context2, OPTIONAL
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; IN UINT32 NewStack
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(InternalX86DisablePaging64)
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ASM_PFX(InternalX86DisablePaging64):
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cli
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lea rsi, [.0] ; rsi <- The start address of transition code
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mov edi, [rsp + 0x28] ; rdi <- New stack
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lea rax, [mTransitionEnd] ; rax <- end of transition code
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sub rax, rsi ; rax <- The size of transition piece code
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add rax, 4 ; Round RAX up to the next 4 byte boundary
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and al, 0xfc
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sub rdi, rax ; rdi <- Use stack to hold transition code
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mov r10d, edi ; r10 <- The start address of transicition code below 4G
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push rcx ; save rcx to stack
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mov rcx, rax ; rcx <- The size of transition piece code
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rep movsb ; copy transition code to top of new stack which must be below 4GB
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pop rcx ; restore rcx
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mov esi, r8d
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mov edi, r9d
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mov eax, r10d ; eax <- start of the transition code on the stack
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sub eax, 4 ; eax <- One slot below transition code on the stack
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push rcx ; push Cs to stack
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push r10 ; push address of tansition code on stack
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DB 0x48 ; prefix to composite "retq" with next "retf"
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retf ; Use far return to load CS register from stack
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; Start of transition code
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.0:
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mov esp, eax ; set up new stack
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mov rax, cr0
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btr eax, 31 ; Clear CR0.PG
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mov cr0, rax ; disable paging and caches
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mov ebx, edx ; save EntryPoint to rbx, for rdmsr will overwrite rdx
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mov ecx, 0xc0000080
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rdmsr
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and ah, ~ 1 ; clear LME
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wrmsr
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mov rax, cr4
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and al, ~ (1 << 5) ; clear PAE
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mov cr4, rax
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push rdi ; push Context2
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push rsi ; push Context1
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call rbx ; transfer control to EntryPoint
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hlt ; no one should get here
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mTransitionEnd:
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