mirror of https://github.com/acidanthera/audk.git
ArmPkg: Add comments to ArmEnableVFP
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11740 6f19259b-4bc3-4df7-8a09-765794883524
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@ -316,12 +316,15 @@ ASM_PFX(ArmWriteCPACR):
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bx lr
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ASM_PFX(ArmEnableVFP):
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# Enable VFP registers
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# Read CPACR (Coprocessor Access Control Register)
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mrc p15, 0, r0, c1, c0, 2
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orr r0, r0, #0x00f00000 @ Enable VPF access (V* instructions)
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# Enable VPF access (Full Access to CP10, CP11) (V* instructions)
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orr r0, r0, #0x00f00000
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# Write back CPACR (Coprocessor Access Control Register)
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mcr p15, 0, r0, c1, c0, 2
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mov r0, #0x40000000 @ Set EN bit in FPEXC
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mcr p10,#0x7,r0,c8,c0,#0 @ msr FPEXC,r0 in ARM assembly
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# Set EN bit in FPEXC. The Advanced SIMD and VFP extensions are enabled and operate normally.
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mov r0, #0x40000000
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mcr p10,#0x7,r0,c8,c0,#0
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bx lr
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ASM_PFX(ArmCallWFI):
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@ -314,12 +314,15 @@ ArmWriteCPACR
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bx lr
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ArmEnableVFP
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// Enable VFP registers
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// Read CPACR (Coprocessor Access Control Register)
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mrc p15, 0, r0, c1, c0, 2
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orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
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// Enable VPF access (Full Access to CP10, CP11) (V* instructions)
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orr r0, r0, #0x00f00000
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// Write back CPACR (Coprocessor Access Control Register)
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mcr p15, 0, r0, c1, c0, 2
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mov r0, #0x40000000 // Set EN bit in FPEXC
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mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
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// Set EN bit in FPEXC. The Advanced SIMD and VFP extensions are enabled and operate normally.
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mov r0, #0x40000000
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mcr p10,#0x7,r0,c8,c0,#0
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bx lr
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ArmCallWFI
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