From 47d183db53d91a669b4b080036434e30cea01e29 Mon Sep 17 00:00:00 2001 From: Olivier Martin Date: Wed, 26 Mar 2014 19:32:48 +0000 Subject: [PATCH] ArmPkg/ArmCortexA5x: Declared the helper functions to access the CPU Extended Control Register This register is A5x specific. It is the reason why the code moved from ArmLib to ArmCpuLib/ArmCortexA5xLib. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15397 6f19259b-4bc3-4df7-8a09-765794883524 --- .../AArch64/ArmCortexA5xHelper.S | 32 +++++++++++++++++++ .../ArmCortexA5xLib/ArmCortexA5xLib.c | 24 ++++++++++++++ .../ArmCortexA5xLib/ArmCortexA5xLib.inf | 5 ++- ArmPkg/Include/Chipset/ArmCortexA5x.h | 29 ++++++++++++++++- .../ArmLib/Common/AArch64/ArmLibSupport.S | 12 ------- 5 files changed, 88 insertions(+), 14 deletions(-) create mode 100644 ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S new file mode 100644 index 0000000000..e5fbc86bc1 --- /dev/null +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S @@ -0,0 +1,32 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2013 - 2014, ARM Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#------------------------------------------------------------------------------ + +#include + +.text +.align 3 +GCC_ASM_EXPORT (ArmReadCpuExCr) +GCC_ASM_EXPORT (ArmWriteCpuExCr) + +ASM_PFX(ArmReadCpuExCr): + mrs x0, S3_1_c15_c2_1 + ret + +ASM_PFX(ArmWriteCpuExCr): + msr S3_1_c15_c2_1, x0 + dsb sy + isb + ret + +ASM_FUNCTION_REMOVE_IF_UNREFERENCED diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c index d13c7fd6fa..890c9df165 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c @@ -48,3 +48,27 @@ ArmCpuSetupSmpNonSecure ( ) { } + +VOID +EFIAPI +ArmSetCpuExCrBit ( + IN UINT64 Bits + ) +{ + UINT64 Value; + Value = ArmReadCpuExCr (); + Value |= Bits; + ArmWriteCpuExCr (Value); +} + +VOID +EFIAPI +ArmUnsetCpuExCrBit ( + IN UINT64 Bits + ) +{ + UINT64 Value; + Value = ArmReadCpuExCr (); + Value &= ~Bits; + ArmWriteCpuExCr (Value); +} diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf index 486aba74a3..acfa98d41d 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf @@ -1,5 +1,5 @@ #/* @file -# Copyright (c) 2011-2013, ARM Limited. All rights reserved. +# Copyright (c) 2011-2014, ARM Limited. All rights reserved. # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -31,5 +31,8 @@ [Sources.common] ArmCortexA5xLib.c +[Sources.AARCH64] + AArch64/ArmCortexA5xHelper.S | GCC + [FixedPcd] gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz diff --git a/ArmPkg/Include/Chipset/ArmCortexA5x.h b/ArmPkg/Include/Chipset/ArmCortexA5x.h index e2217e3f3a..ba3d5197e9 100644 --- a/ArmPkg/Include/Chipset/ArmCortexA5x.h +++ b/ArmPkg/Include/Chipset/ArmCortexA5x.h @@ -1,6 +1,6 @@ /** @file - Copyright (c) 2012-2013, ARM Limited. All rights reserved. + Copyright (c) 2012-2014, ARM Limited. All rights reserved. This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -20,4 +20,31 @@ // #define A5X_FEATURE_SMP (1 << 6) +// +// Helper functions to access CPU Extended Control Register +// +UINT64 +EFIAPI +ArmReadCpuExCr ( + VOID + ); + +VOID +EFIAPI +ArmWriteCpuExCr ( + IN UINT64 Val + ); + +VOID +EFIAPI +ArmSetCpuExCrBit ( + IN UINT64 Bits + ); + +VOID +EFIAPI +ArmUnsetCpuExCrBit ( + IN UINT64 Bits + ); + #endif diff --git a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S index f169d02aaa..28db98b417 100644 --- a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S @@ -37,8 +37,6 @@ GCC_ASM_EXPORT (ArmWriteScr) GCC_ASM_EXPORT (ArmWriteMVBar) GCC_ASM_EXPORT (ArmCallWFE) GCC_ASM_EXPORT (ArmCallSEV) -GCC_ASM_EXPORT (ArmReadCpuExCr) -GCC_ASM_EXPORT (ArmWriteCpuExCr) GCC_ASM_EXPORT (ArmReadCpuActlr) GCC_ASM_EXPORT (ArmWriteCpuActlr) @@ -200,16 +198,6 @@ ASM_PFX(ArmCallSEV): sev ret -ASM_PFX(ArmReadCpuExCr): - mrs x0, S3_1_c15_c2_1 - ret - -ASM_PFX(ArmWriteCpuExCr): - msr S3_1_c15_c2_1, x0 - dsb sy - isb - ret - ASM_PFX(ArmReadCpuActlr): mrs x0, S3_1_c15_c2_0 ret