From 47f75d2169eca006d93216f14f86ded6470f9be2 Mon Sep 17 00:00:00 2001
From: Eric Dong <eric.dong@intel.com>
Date: Thu, 30 Aug 2018 13:49:16 +0800
Subject: [PATCH] UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h: Add new MSR.

Changes includes:
  1. Add new MSR: MSR_SILVERMONT_PLATFORM_INFO

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
---
 .../Include/Register/Msr/SilvermontMsr.h      | 48 +++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h b/UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h
index 03bbd0af7c..c3d0f8c208 100644
--- a/UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h
+++ b/UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h
@@ -375,6 +375,54 @@ typedef union {
 } MSR_SILVERMONT_FSB_FREQ_REGISTER;
 
 
+/**
+  Package. Platform Information: Contains power management and other model
+  specific features enumeration. See http://biosbits.org.
+
+  @param  ECX  MSR_SILVERMONT_PLATFORM_INFO (0x000000CE)
+  @param  EAX  Lower 32-bits of MSR value.
+               Described by the type MSR_SILVERMONT_PLATFORM_INFO_REGISTER.
+  @param  EDX  Upper 32-bits of MSR value.
+               Described by the type MSR_SILVERMONT_PLATFORM_INFO_REGISTER.
+
+  <b>Example usage</b>
+  @code
+  MSR_SILVERMONT_PLATFORM_INFO_REGISTER  Msr;
+
+  Msr.Uint64 = AsmReadMsr64 (MSR_SILVERMONT_PLATFORM_INFO);
+  AsmWriteMsr64 (MSR_SILVERMONT_PLATFORM_INFO, Msr.Uint64);
+  @endcode
+**/
+#define MSR_SILVERMONT_PLATFORM_INFO             0x000000CE
+
+/**
+  MSR information returned for MSR index #MSR_SILVERMONT_PLATFORM_INFO
+**/
+typedef union {
+  ///
+  /// Individual bit fields
+  ///
+  struct {
+    UINT32  Reserved1:8;
+    ///
+    /// [Bits 15:8] Package. Maximum Non-Turbo Ratio (R/O) This is the ratio
+    /// of the maximum frequency that does not require turbo. Frequency =
+    /// ratio * Scalable Bus Frequency.
+    ///
+    UINT32  MaximumNon_TurboRatio:8;
+    UINT32  Reserved2:16;
+    UINT32  Reserved3:32;
+  } Bits;
+  ///
+  /// All bit fields as a 32-bit value
+  ///
+  UINT32  Uint32;
+  ///
+  /// All bit fields as a 64-bit value
+  ///
+  UINT64  Uint64;
+} MSR_SILVERMONT_PLATFORM_INFO_REGISTER;
+
 /**
   Module. C-State Configuration Control (R/W)  Note: C-state values are
   processor specific C-state code names, unrelated to MWAIT extension C-state