ArmPkg: Emit BTI opcodes when BTI codegen is enabled

When building with -mbranch-protection=bti, which affects the compiler
codegen only, ensure that the assembler based codegen is aligned with
this, by emitting the BTI C opcode at the start of each exported
function. While most exported functions are not in fact ever called
indirectly, whether or not this is the case is a property of the caller
so annotating every exported function is a reasonable default.

While at it, fix two occurrences in ArmPkg of exported functions that
did not use the ASM_FUNC() macro.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Oliver Smith-Denny <osd@smith-denny.com>
This commit is contained in:
Ard Biesheuvel 2023-03-27 12:10:06 +02:00 committed by mergify[bot]
parent f8b1854b92
commit 48d642a310
3 changed files with 6 additions and 6 deletions

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@ -38,7 +38,8 @@
.global Name ; \ .global Name ; \
.section #Section, "ax" ; \ .section #Section, "ax" ; \
.type Name, %function ; \ .type Name, %function ; \
Name: Name: ; \
AARCH64_BTI(c)
#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name) #define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)

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@ -94,7 +94,6 @@
GCC_ASM_EXPORT(ExceptionHandlersEnd) GCC_ASM_EXPORT(ExceptionHandlersEnd)
GCC_ASM_EXPORT(CommonCExceptionHandler) GCC_ASM_EXPORT(CommonCExceptionHandler)
GCC_ASM_EXPORT(RegisterEl0Stack)
.text .text
@ -387,6 +386,6 @@ ASM_PFX(CommonExceptionEntry):
eret eret
ASM_PFX(RegisterEl0Stack): ASM_FUNC(RegisterEl0Stack)
msr sp_el0, x0 msr sp_el0, x0
ret ret

View File

@ -5,12 +5,12 @@
// //
// //
#include <AsmMacroIoLibV8.h>
.text .text
.align 3 .align 3
GCC_ASM_EXPORT(ArmCallSvc) ASM_FUNC(ArmCallSvc)
ASM_PFX(ArmCallSvc):
// Push frame pointer and return address on the stack // Push frame pointer and return address on the stack
stp x29, x30, [sp, #-32]! stp x29, x30, [sp, #-32]!
mov x29, sp mov x29, sp