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Fix ICC11 build failure.

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Signed-off-by: lgao4
Reviewed-by: mdkinney

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12821 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
lgao4 2011-12-06 04:26:55 +00:00
parent effcb0792b
commit 49cc8d2215
2 changed files with 121 additions and 3 deletions
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6
EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/BaseLib.inf
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@ -1,6 +1,6 @@
#/*++ #/*++
# #
# Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR> # Copyright (c) 2004 - 2011, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials # This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License # are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at # which accompanies this distribution. The full text of the license may be found at
@ -587,8 +587,8 @@ COMPONENT_TYPE = LIBRARY
Ipf/ReadCpuid.s Ipf/ReadCpuid.s
Ipf/AccessGp.s Ipf/AccessGp.s
Math64.c Math64.c
Ipf/CpuBreakpoint.c | INTEL Ipf/CpuBreakpoint.c | INTEL
Ipf/CpuBreakpoint.c | MSFT Ipf/CpuBreakpointMsc.c | MSFT
Synchronization.c | INTEL Synchronization.c | INTEL
SynchronizationMsc.c | MSFT SynchronizationMsc.c | MSFT
SynchronizationGcc.c | GCC SynchronizationGcc.c | GCC

118
EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ipf/CpuBreakpointMsc.c Normal file
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@ -0,0 +1,118 @@
/** @file
Base Library CPU functions for Itanium
Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#include "BaseLibInternals.h"
#pragma intrinsic (_enable)
#pragma intrinsic (_disable)
#pragma intrinsic (__break)
#pragma intrinsic (__mfa)
/**
Generates a breakpoint on the CPU.
Generates a breakpoint on the CPU. The breakpoint must be implemented such
that code can resume normal execution after the breakpoint.
**/
VOID
EFIAPI
CpuBreakpoint (
VOID
)
{
__break (0);
}
/**
Used to serialize load and store operations.
All loads and stores that proceed calls to this function are guaranteed to be
globally visible when this function returns.
**/
VOID
EFIAPI
MemoryFence (
VOID
)
{
__mfa ();
}
/**
Disables CPU interrupts.
Disables CPU interrupts.
**/
VOID
EFIAPI
DisableInterrupts (
VOID
)
{
_disable ();
}
/**
Enables CPU interrupts.
Enables CPU interrupts.
**/
VOID
EFIAPI
EnableInterrupts (
VOID
)
{
_enable ();
}
/**
Enables CPU interrupts for the smallest window required to capture any
pending interrupts.
Enables CPU interrupts for the smallest window required to capture any
pending interrupts.
**/
VOID
EFIAPI
EnableDisableInterrupts (
VOID
)
{
EnableInterrupts ();
DisableInterrupts ();
}
/**
Places the CPU in a sleep state until an interrupt is received.
Places the CPU in a sleep state until an interrupt is received. If interrupts
are disabled prior to calling this function, then the CPU will be placed in a
sleep state indefinitely.
**/
VOID
EFIAPI
CpuSleep (
VOID
)
{
PalCallStatic (NULL, 29, 0, 0, 0);
}