mirror of https://github.com/acidanthera/audk.git
OvmfPkg: remove PciHostBridgeDxe fork
This driver is now unused. Cc: Jordan Justen <jordan.l.justen@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Laszlo Ersek
parent
cef83a3050
commit
4a392a451d
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@ -1,136 +0,0 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
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;
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; This program and the accompanying materials are licensed and made available
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; under the terms and conditions of the BSD License which accompanies this
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; distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;------------------------------------------------------------------------------
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SECTION .text
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; IoReadFifo8 (
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; IN UINTN Port,
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; IN UINTN Size,
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; IN VOID *Buffer
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(IoReadFifo8)
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ASM_PFX(IoReadFifo8):
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push edi
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cld
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mov dx, [esp + 8]
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mov ecx, [esp + 12]
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mov edi, [esp + 16]
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rep insb
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pop edi
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ret
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; IoReadFifo16 (
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; IN UINTN Port,
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; IN UINTN Size,
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; IN VOID *Buffer
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(IoReadFifo16)
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ASM_PFX(IoReadFifo16):
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push edi
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cld
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mov dx, [esp + 8]
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mov ecx, [esp + 12]
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mov edi, [esp + 16]
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rep insw
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pop edi
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ret
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; IoReadFifo32 (
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; IN UINTN Port,
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; IN UINTN Size,
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; IN VOID *Buffer
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(IoReadFifo32)
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ASM_PFX(IoReadFifo32):
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push edi
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cld
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mov dx, [esp + 8]
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mov ecx, [esp + 12]
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mov edi, [esp + 16]
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rep insd
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pop edi
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ret
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; IoWriteFifo8 (
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; IN UINTN Port,
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; IN UINTN Size,
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; IN VOID *Buffer
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(IoWriteFifo8)
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ASM_PFX(IoWriteFifo8):
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push esi
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cld
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mov dx, [esp + 8]
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mov ecx, [esp + 12]
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mov esi, [esp + 16]
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rep outsb
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pop esi
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ret
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; IoWriteFifo16 (
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; IN UINTN Port,
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; IN UINTN Size,
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; IN VOID *Buffer
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(IoWriteFifo16)
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ASM_PFX(IoWriteFifo16):
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push esi
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cld
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mov dx, [esp + 8]
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mov ecx, [esp + 12]
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mov esi, [esp + 16]
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rep outsw
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pop esi
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ret
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; IoWriteFifo32 (
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; IN UINTN Port,
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; IN UINTN Size,
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; IN VOID *Buffer
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(IoWriteFifo32)
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ASM_PFX(IoWriteFifo32):
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push esi
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cld
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mov dx, [esp + 8]
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mov ecx, [esp + 12]
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mov esi, [esp + 16]
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rep outsd
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pop esi
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ret
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@ -1,176 +0,0 @@
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/** @file
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I/O FIFO routines
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Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available
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under the terms and conditions of the BSD License which accompanies this
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distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _IO_FIFO_H_INCLUDED_
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#define _IO_FIFO_H_INCLUDED_
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/**
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Reads an 8-bit I/O port fifo into a block of memory.
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Reads the 8-bit I/O fifo port specified by Port.
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The port is read Count times, and the read data is
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stored in the provided Buffer.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If 8-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@param Count The number of times to read I/O port.
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@param Buffer The buffer to store the read data into.
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**/
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VOID
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EFIAPI
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IoReadFifo8 (
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IN UINTN Port,
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IN UINTN Count,
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OUT VOID *Buffer
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);
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/**
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Reads a 16-bit I/O port fifo into a block of memory.
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Reads the 16-bit I/O fifo port specified by Port.
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The port is read Count times, and the read data is
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stored in the provided Buffer.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If 16-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@param Count The number of times to read I/O port.
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@param Buffer The buffer to store the read data into.
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**/
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VOID
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EFIAPI
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IoReadFifo16 (
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IN UINTN Port,
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IN UINTN Count,
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OUT VOID *Buffer
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);
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/**
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Reads a 32-bit I/O port fifo into a block of memory.
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Reads the 32-bit I/O fifo port specified by Port.
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The port is read Count times, and the read data is
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stored in the provided Buffer.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If 32-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@param Count The number of times to read I/O port.
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@param Buffer The buffer to store the read data into.
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**/
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VOID
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EFIAPI
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IoReadFifo32 (
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IN UINTN Port,
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IN UINTN Count,
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OUT VOID *Buffer
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);
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/**
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Writes a block of memory into an 8-bit I/O port fifo.
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Writes the 8-bit I/O fifo port specified by Port.
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The port is written Count times, and the write data is
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retrieved from the provided Buffer.
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This function must guarantee that all I/O write and write operations are
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serialized.
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If 8-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to write.
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@param Count The number of times to write I/O port.
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@param Buffer The buffer to store the write data into.
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**/
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VOID
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EFIAPI
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IoWriteFifo8 (
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IN UINTN Port,
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IN UINTN Count,
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OUT VOID *Buffer
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);
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/**
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Writes a block of memory into a 16-bit I/O port fifo.
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Writes the 16-bit I/O fifo port specified by Port.
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The port is written Count times, and the write data is
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retrieved from the provided Buffer.
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This function must guarantee that all I/O write and write operations are
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serialized.
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If 16-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to write.
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@param Count The number of times to write I/O port.
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@param Buffer The buffer to store the write data into.
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**/
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VOID
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EFIAPI
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IoWriteFifo16 (
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IN UINTN Port,
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IN UINTN Count,
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OUT VOID *Buffer
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);
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/**
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Writes a block of memory into a 32-bit I/O port fifo.
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Writes the 32-bit I/O fifo port specified by Port.
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The port is written Count times, and the write data is
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retrieved from the provided Buffer.
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This function must guarantee that all I/O write and write operations are
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serialized.
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If 32-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to write.
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@param Count The number of times to write I/O port.
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@param Buffer The buffer to store the write data into.
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**/
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VOID
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EFIAPI
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IoWriteFifo32 (
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IN UINTN Port,
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IN UINTN Count,
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OUT VOID *Buffer
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);
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#endif
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File diff suppressed because it is too large
Load Diff
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@ -1,651 +0,0 @@
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/** @file
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The Header file of the Pci Host Bridge Driver
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Copyright (C) 2015, Red Hat, Inc.
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Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available
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under the terms and conditions of the BSD License which accompanies this
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distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _PCI_HOST_BRIDGE_H_
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#define _PCI_HOST_BRIDGE_H_
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#include <PiDxe.h>
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#include <IndustryStandard/Pci.h>
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#include <IndustryStandard/Acpi.h>
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#include <Protocol/PciHostBridgeResourceAllocation.h>
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#include <Protocol/PciRootBridgeIo.h>
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#include <Protocol/Metronome.h>
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#include <Protocol/DevicePath.h>
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#include <Library/BaseLib.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/UefiLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/DxeServicesTableLib.h>
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#include <Library/DevicePathLib.h>
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#include <Library/IoLib.h>
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#include <Library/PciLib.h>
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#define MAX_PCI_DEVICE_NUMBER 31
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#define MAX_PCI_FUNCTION_NUMBER 7
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#define MAX_PCI_REG_ADDRESS 0xFF
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typedef enum {
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IoOperation,
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MemOperation,
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PciOperation
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} OPERATION_TYPE;
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#define PCI_HOST_BRIDGE_SIGNATURE SIGNATURE_32('e', 'h', 's', 't')
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typedef struct {
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UINTN Signature;
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EFI_HANDLE HostBridgeHandle;
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LIST_ENTRY Head;
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BOOLEAN ResourceSubmited;
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BOOLEAN CanRestarted;
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EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL ResAlloc;
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} PCI_HOST_BRIDGE_INSTANCE;
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#define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) \
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CR(a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)
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//
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// HostBridge Resource Allocation interface
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//
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/**
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These are the notifications from the PCI bus driver that it is about to enter
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a certain phase of the PCI enumeration process.
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This member function can be used to notify the host bridge driver to perform
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specific actions, including any chipset-specific initialization, so that the
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chipset is ready to enter the next phase. Eight notification points are
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defined at this time. See belows:
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EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures
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and internal data structures. The PCI
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enumerator should issue this
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notification before starting a fresh
|
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enumeration process. Enumeration
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cannot be restarted after sending any
|
||||
other notification such as
|
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EfiPciHostBridgeBeginBusAllocation.
|
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EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to
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begin. No specific action is required
|
||||
here. This notification can be used to
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perform any chipset-specific
|
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programming.
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EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming
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phase is complete. No specific action
|
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is required here. This notification
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can be used to perform any
|
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chipset-specific programming.
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|
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EfiPciHostBridgeBeginResourceAllocation
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The resource allocation phase is about
|
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to begin. No specific action is
|
||||
required here. This notification can
|
||||
be used to perform any
|
||||
chipset-specific programming.
|
||||
|
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EfiPciHostBridgeAllocateResources Allocates resources per previously
|
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submitted requests for all the PCI
|
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root bridges. These resource settings
|
||||
are returned on the next call to
|
||||
GetProposedResources(). Before calling
|
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NotifyPhase() with a Phase of
|
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EfiPciHostBridgeAllocateResource, the
|
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PCI bus enumerator is responsible for
|
||||
gathering I/O and memory requests for
|
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all the PCI root bridges and
|
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submitting these requests using
|
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SubmitResources(). This function pads
|
||||
the resource amount to suit the root
|
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bridge hardware, takes care of
|
||||
dependencies between the PCI root
|
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bridges, and calls the Global
|
||||
Coherency Domain (GCD) with the
|
||||
allocation request. In the case of
|
||||
padding, the allocated range could be
|
||||
bigger than what was requested.
|
||||
|
||||
EfiPciHostBridgeSetResources Programs the host bridge hardware to
|
||||
decode previously allocated resources
|
||||
(proposed resources) for all the PCI
|
||||
root bridges. After the hardware is
|
||||
programmed, reassigning resources will
|
||||
not be supported. The bus settings are
|
||||
not affected.
|
||||
|
||||
EfiPciHostBridgeFreeResources Deallocates resources that were
|
||||
previously allocated for all the PCI
|
||||
root bridges and resets the I/O and
|
||||
memory apertures to their initial
|
||||
state. The bus settings are not
|
||||
affected. If the request to allocate
|
||||
resources fails, the PCI enumerator
|
||||
can use this notification to
|
||||
deallocate previous resources, adjust
|
||||
the requests, and retry allocation.
|
||||
|
||||
EfiPciHostBridgeEndResourceAllocation The resource allocation phase is
|
||||
completed. No specific action is
|
||||
required here. This notification can
|
||||
be used to perform any chipsetspecific
|
||||
programming.
|
||||
|
||||
@param[in] This The instance pointer of
|
||||
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
|
||||
|
||||
@param[in] Phase The phase during enumeration
|
||||
|
||||
@retval EFI_NOT_READY This phase cannot be entered at this time. For
|
||||
example, this error is valid for a Phase of
|
||||
EfiPciHostBridgeAllocateResources if
|
||||
SubmitResources() has not been called for one
|
||||
or more PCI root bridges before this call
|
||||
|
||||
@retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
|
||||
This error is valid for a Phase of
|
||||
EfiPciHostBridgeSetResources.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER Invalid phase parameter
|
||||
|
||||
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
|
||||
lack of resources. This error is valid for a
|
||||
Phase of EfiPciHostBridgeAllocateResources if
|
||||
the previously submitted resource requests
|
||||
cannot be fulfilled or were only partially
|
||||
fulfilled.
|
||||
|
||||
@retval EFI_SUCCESS The notification was accepted without any
|
||||
errors.
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
NotifyPhase(
|
||||
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
|
||||
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
|
||||
);
|
||||
|
||||
/**
|
||||
Return the device handle of the next PCI root bridge that is associated with
|
||||
this Host Bridge.
|
||||
|
||||
This function is called multiple times to retrieve the device handles of all
|
||||
the PCI root bridges that are associated with this PCI host bridge. Each PCI
|
||||
host bridge is associated with one or more PCI root bridges. On each call,
|
||||
the handle that was returned by the previous call is passed into the
|
||||
interface, and on output the interface returns the device handle of the next
|
||||
PCI root bridge. The caller can use the handle to obtain the instance of the
|
||||
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL for that root bridge. When there are no more
|
||||
PCI root bridges to report, the interface returns EFI_NOT_FOUND. A PCI
|
||||
enumerator must enumerate the PCI root bridges in the order that they are
|
||||
returned by this function.
|
||||
|
||||
For D945 implementation, there is only one root bridge in PCI host bridge.
|
||||
|
||||
@param[in] This The instance pointer of
|
||||
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
|
||||
|
||||
@param[in, out] RootBridgeHandle Returns the device handle of the next PCI
|
||||
root bridge.
|
||||
|
||||
@retval EFI_SUCCESS If parameter RootBridgeHandle = NULL, then
|
||||
return the first Rootbridge handle of the
|
||||
specific Host bridge and return EFI_SUCCESS.
|
||||
|
||||
@retval EFI_NOT_FOUND Can not find the any more root bridge in
|
||||
specific host bridge.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was
|
||||
returned on a previous call to
|
||||
GetNextRootBridge().
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GetNextRootBridge(
|
||||
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
|
||||
IN OUT EFI_HANDLE *RootBridgeHandle
|
||||
);
|
||||
|
||||
/**
|
||||
Returns the allocation attributes of a PCI root bridge.
|
||||
|
||||
The function returns the allocation attributes of a specific PCI root bridge.
|
||||
The attributes can vary from one PCI root bridge to another. These attributes
|
||||
are different from the decode-related attributes that are returned by the
|
||||
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.GetAttributes() member function. The
|
||||
RootBridgeHandle parameter is used to specify the instance of the PCI root
|
||||
bridge. The device handles of all the root bridges that are associated with
|
||||
this host bridge must be obtained by calling GetNextRootBridge(). The
|
||||
attributes are static in the sense that they do not change during or after
|
||||
the enumeration process. The hardware may provide mechanisms to change the
|
||||
attributes on the fly, but such changes must be completed before
|
||||
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is installed. The permitted
|
||||
values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
|
||||
"Related Definitions" below. The caller uses these attributes to combine
|
||||
multiple resource requests.
|
||||
|
||||
For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI
|
||||
bus enumerator needs to include requests for the prefetchable memory in the
|
||||
nonprefetchable memory pool and not request any prefetchable memory.
|
||||
|
||||
Attribute Description
|
||||
------------------------------------ ---------------------------------------
|
||||
EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM If this bit is set, then the PCI root
|
||||
bridge does not support separate
|
||||
windows for nonprefetchable and
|
||||
prefetchable memory. A PCI bus driver
|
||||
needs to include requests for
|
||||
prefetchable memory in the
|
||||
nonprefetchable memory pool.
|
||||
|
||||
EFI_PCI_HOST_BRIDGE_MEM64_DECODE If this bit is set, then the PCI root
|
||||
bridge supports 64-bit memory windows.
|
||||
If this bit is not set, the PCI bus
|
||||
driver needs to include requests for a
|
||||
64-bit memory address in the
|
||||
corresponding 32-bit memory pool.
|
||||
|
||||
@param[in] This The instance pointer of
|
||||
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
|
||||
|
||||
@param[in] RootBridgeHandle The device handle of the PCI root bridge in
|
||||
which the caller is interested. Type
|
||||
EFI_HANDLE is defined in
|
||||
InstallProtocolInterface() in the UEFI 2.0
|
||||
Specification.
|
||||
|
||||
@param[out] Attributes The pointer to attribte of root bridge, it is
|
||||
output parameter
|
||||
|
||||
@retval EFI_INVALID_PARAMETER Attribute pointer is NULL
|
||||
|
||||
@retval EFI_INVALID_PARAMETER RootBridgehandle is invalid.
|
||||
|
||||
@retval EFI_SUCCESS Success to get attribute of interested root
|
||||
bridge.
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GetAttributes(
|
||||
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
|
||||
IN EFI_HANDLE RootBridgeHandle,
|
||||
OUT UINT64 *Attributes
|
||||
);
|
||||
|
||||
/**
|
||||
Sets up the specified PCI root bridge for the bus enumeration process.
|
||||
|
||||
This member function sets up the root bridge for bus enumeration and returns
|
||||
the PCI bus range over which the search should be performed in ACPI 2.0
|
||||
resource descriptor format.
|
||||
|
||||
@param[in] This The
|
||||
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
|
||||
instance.
|
||||
|
||||
@param[in] RootBridgeHandle The PCI Root Bridge to be set up.
|
||||
|
||||
@param[out] Configuration Pointer to the pointer to the PCI bus resource
|
||||
descriptor.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
|
||||
|
||||
@retval EFI_OUT_OF_RESOURCES Fail to allocate ACPI resource descriptor tag.
|
||||
|
||||
@retval EFI_SUCCESS Sucess to allocate ACPI resource descriptor.
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
StartBusEnumeration(
|
||||
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
|
||||
IN EFI_HANDLE RootBridgeHandle,
|
||||
OUT VOID **Configuration
|
||||
);
|
||||
|
||||
/**
|
||||
Programs the PCI root bridge hardware so that it decodes the specified PCI
|
||||
bus range.
|
||||
|
||||
This member function programs the specified PCI root bridge to decode the bus
|
||||
range that is specified by the input parameter Configuration.
|
||||
The bus range information is specified in terms of the ACPI 2.0 resource
|
||||
descriptor format.
|
||||
|
||||
@param[in] This The
|
||||
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
|
||||
instance
|
||||
|
||||
@param[in] RootBridgeHandle The PCI Root Bridge whose bus range is to be
|
||||
programmed
|
||||
|
||||
@param[in] Configuration The pointer to the PCI bus resource descriptor
|
||||
|
||||
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge
|
||||
handle.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER Configuration is NULL.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI
|
||||
2.0 resource descriptor.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI
|
||||
2.0 bus resource descriptor.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER Configuration includes valid ACPI 2.0 resource
|
||||
descriptors other than bus descriptors.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER Configuration contains one or more invalid
|
||||
ACPI resource descriptors.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this
|
||||
root bridge.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this
|
||||
root bridge.
|
||||
|
||||
@retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
|
||||
|
||||
@retval EFI_SUCCESS The bus range for the PCI root bridge was
|
||||
programmed.
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
SetBusNumbers(
|
||||
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
|
||||
IN EFI_HANDLE RootBridgeHandle,
|
||||
IN VOID *Configuration
|
||||
);
|
||||
|
||||
/**
|
||||
Submits the I/O and memory resource requirements for the specified PCI root
|
||||
bridge.
|
||||
|
||||
This function is used to submit all the I/O and memory resources that are
|
||||
required by the specified PCI root bridge. The input parameter Configuration
|
||||
is used to specify the following:
|
||||
- The various types of resources that are required
|
||||
- The associated lengths in terms of ACPI 2.0 resource descriptor format
|
||||
|
||||
@param[in] This Pointer to the
|
||||
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
|
||||
instance.
|
||||
|
||||
@param[in] RootBridgeHandle The PCI root bridge whose I/O and memory
|
||||
resource requirements are being submitted.
|
||||
|
||||
@param[in] Configuration The pointer to the PCI I/O and PCI memory
|
||||
resource descriptor.
|
||||
|
||||
@retval EFI_SUCCESS The I/O and memory resource requests for a PCI
|
||||
root bridge were accepted.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge
|
||||
handle.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER Configuration is NULL.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI
|
||||
2.0 resource descriptor.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER Configuration includes requests for one or
|
||||
more resource types that are not supported by
|
||||
this PCI root bridge. This error will happen
|
||||
if the caller did not combine resources
|
||||
according to Attributes that were returned by
|
||||
GetAllocAttributes().
|
||||
|
||||
@retval EFI_INVALID_PARAMETER Address Range Maximum" is invalid.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this PCI
|
||||
root bridge.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER "Address Space Granularity" is invalid for
|
||||
this PCI root bridge.
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
SubmitResources(
|
||||
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
|
||||
IN EFI_HANDLE RootBridgeHandle,
|
||||
IN VOID *Configuration
|
||||
);
|
||||
|
||||
/**
|
||||
Returns the proposed resource settings for the specified PCI root bridge.
|
||||
|
||||
This member function returns the proposed resource settings for the
|
||||
specified PCI root bridge. The proposed resource settings are prepared when
|
||||
NotifyPhase() is called with a Phase of EfiPciHostBridgeAllocateResources.
|
||||
The output parameter Configuration specifies the following:
|
||||
- The various types of resources, excluding bus resources, that are
|
||||
allocated
|
||||
- The associated lengths in terms of ACPI 2.0 resource descriptor format
|
||||
|
||||
@param[in] This Pointer to the
|
||||
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
|
||||
instance.
|
||||
|
||||
@param[in] RootBridgeHandle The PCI root bridge handle. Type EFI_HANDLE is
|
||||
defined in InstallProtocolInterface() in the
|
||||
UEFI 2.0 Specification.
|
||||
|
||||
@param[out] Configuration The pointer to the pointer to the PCI I/O and
|
||||
memory resource descriptor.
|
||||
|
||||
@retval EFI_SUCCESS The requested parameters were returned.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge
|
||||
handle.
|
||||
|
||||
@retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
|
||||
|
||||
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a
|
||||
lack of resources.
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
GetProposedResources(
|
||||
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
|
||||
IN EFI_HANDLE RootBridgeHandle,
|
||||
OUT VOID **Configuration
|
||||
);
|
||||
|
||||
/**
|
||||
Provides the hooks from the PCI bus driver to every PCI controller
|
||||
(device/function) at various stages of the PCI enumeration process that allow
|
||||
the host bridge driver to preinitialize individual PCI controllers before
|
||||
enumeration.
|
||||
|
||||
This function is called during the PCI enumeration process. No specific
|
||||
action is expected from this member function. It allows the host bridge
|
||||
driver to preinitialize individual PCI controllers before enumeration.
|
||||
|
||||
@param This Pointer to the
|
||||
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
|
||||
instance.
|
||||
|
||||
@param RootBridgeHandle The associated PCI root bridge handle. Type
|
||||
EFI_HANDLE is defined in InstallProtocolInterface()
|
||||
in the UEFI 2.0 Specification.
|
||||
|
||||
@param PciAddress The address of the PCI device on the PCI bus. This
|
||||
address can be passed to the
|
||||
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to
|
||||
access the PCI configuration space of the device.
|
||||
See Table 12-1 in the UEFI 2.0 Specification for the
|
||||
definition of
|
||||
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
|
||||
|
||||
@param Phase The phase of the PCI device enumeration.
|
||||
|
||||
@retval EFI_SUCCESS The requested parameters were returned.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge
|
||||
handle.
|
||||
|
||||
@retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined
|
||||
in
|
||||
EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
|
||||
|
||||
@retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
|
||||
The PCI enumerator should not enumerate this
|
||||
device, including its child devices if it is
|
||||
a PCI-to-PCI bridge.
|
||||
**/
|
||||
EFI_STATUS
|
||||
EFIAPI
|
||||
PreprocessController (
|
||||
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
|
||||
IN EFI_HANDLE RootBridgeHandle,
|
||||
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
|
||||
IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
|
||||
);
|
||||
|
||||
|
||||
//
|
||||
// Define resource status constant
|
||||
//
|
||||
#define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL
|
||||
#define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL
|
||||
|
||||
|
||||
//
|
||||
// Driver Instance Data Prototypes
|
||||
//
|
||||
|
||||
typedef struct {
|
||||
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation;
|
||||
UINTN NumberOfBytes;
|
||||
UINTN NumberOfPages;
|
||||
EFI_PHYSICAL_ADDRESS HostAddress;
|
||||
EFI_PHYSICAL_ADDRESS MappedHostAddress;
|
||||
} MAP_INFO;
|
||||
|
||||
typedef struct {
|
||||
ACPI_HID_DEVICE_PATH AcpiDevicePath;
|
||||
EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
|
||||
} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
|
||||
|
||||
typedef struct {
|
||||
UINT64 BusBase;
|
||||
UINT64 BusLimit;
|
||||
|
||||
UINT64 MemBase;
|
||||
UINT64 MemLimit;
|
||||
|
||||
UINT64 IoBase;
|
||||
UINT64 IoLimit;
|
||||
} PCI_ROOT_BRIDGE_RESOURCE_APERTURE;
|
||||
|
||||
typedef enum {
|
||||
TypeIo = 0,
|
||||
TypeMem32,
|
||||
TypePMem32,
|
||||
TypeMem64,
|
||||
TypePMem64,
|
||||
TypeBus,
|
||||
TypeMax
|
||||
} PCI_RESOURCE_TYPE;
|
||||
|
||||
typedef enum {
|
||||
ResNone = 0,
|
||||
ResSubmitted,
|
||||
ResRequested,
|
||||
ResAllocated,
|
||||
ResStatusMax
|
||||
} RES_STATUS;
|
||||
|
||||
typedef struct {
|
||||
PCI_RESOURCE_TYPE Type;
|
||||
UINT64 Base;
|
||||
UINT64 Length;
|
||||
UINT64 Alignment;
|
||||
RES_STATUS Status;
|
||||
} PCI_RES_NODE;
|
||||
|
||||
#pragma pack(1)
|
||||
typedef struct {
|
||||
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR SpaceDesc[TypeMax];
|
||||
EFI_ACPI_END_TAG_DESCRIPTOR EndDesc;
|
||||
} RESOURCE_CONFIGURATION;
|
||||
#pragma pack()
|
||||
|
||||
#define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32('e', '2', 'p', 'b')
|
||||
|
||||
typedef struct {
|
||||
UINT32 Signature;
|
||||
LIST_ENTRY Link;
|
||||
EFI_HANDLE Handle;
|
||||
UINT64 RootBridgeAttrib;
|
||||
UINT64 Attributes;
|
||||
UINT64 Supports;
|
||||
|
||||
//
|
||||
// Specific for this memory controller: Bus, I/O, Mem
|
||||
//
|
||||
PCI_RES_NODE ResAllocNode[6];
|
||||
|
||||
//
|
||||
// Addressing for Memory and I/O and Bus arrange
|
||||
//
|
||||
UINT64 BusBase;
|
||||
UINT64 MemBase;
|
||||
UINT64 IoBase;
|
||||
UINT64 BusLimit;
|
||||
UINT64 MemLimit;
|
||||
UINT64 IoLimit;
|
||||
|
||||
EFI_PCI_ROOT_BRIDGE_DEVICE_PATH DevicePath;
|
||||
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io;
|
||||
|
||||
RESOURCE_CONFIGURATION ConfigBuffer;
|
||||
} PCI_ROOT_BRIDGE_INSTANCE;
|
||||
|
||||
|
||||
//
|
||||
// Driver Instance Data Macros
|
||||
//
|
||||
#define DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) \
|
||||
CR(a, PCI_ROOT_BRIDGE_INSTANCE, Io, PCI_ROOT_BRIDGE_SIGNATURE)
|
||||
|
||||
|
||||
#define DRIVER_INSTANCE_FROM_LIST_ENTRY(a) \
|
||||
CR(a, PCI_ROOT_BRIDGE_INSTANCE, Link, PCI_ROOT_BRIDGE_SIGNATURE)
|
||||
|
||||
/**
|
||||
|
||||
Construct the Pci Root Bridge Io protocol
|
||||
|
||||
@param Protocol Point to protocol instance
|
||||
@param HostBridgeHandle Handle of host bridge
|
||||
@param Attri Attribute of host bridge
|
||||
@param ResAperture ResourceAperture for host bridge
|
||||
|
||||
@retval EFI_SUCCESS Success to initialize the Pci Root Bridge.
|
||||
**/
|
||||
EFI_STATUS
|
||||
RootBridgeConstructor (
|
||||
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *Protocol,
|
||||
IN EFI_HANDLE HostBridgeHandle,
|
||||
IN UINT64 Attri,
|
||||
IN PCI_ROOT_BRIDGE_RESOURCE_APERTURE *ResAperture
|
||||
);
|
||||
|
||||
#endif
|
||||
|
|
@ -1,64 +0,0 @@
|
|||
## @file
|
||||
# The basic interfaces implementation to a single segment PCI Host Bridge
|
||||
# driver.
|
||||
#
|
||||
# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
|
||||
#
|
||||
# This program and the accompanying materials are licensed and made available
|
||||
# under the terms and conditions of the BSD License which accompanies this
|
||||
# distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
|
||||
# IMPLIED.
|
||||
#
|
||||
##
|
||||
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = PciHostBridge
|
||||
FILE_GUID = 311161C5-BFD9-4504-8016-213F2DAEDAF3
|
||||
MODULE_TYPE = DXE_DRIVER
|
||||
VERSION_STRING = 1.0
|
||||
|
||||
ENTRY_POINT = InitializePciHostBridge
|
||||
|
||||
[Packages]
|
||||
MdePkg/MdePkg.dec
|
||||
OvmfPkg/OvmfPkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
UefiDriverEntryPoint
|
||||
UefiBootServicesTableLib
|
||||
DxeServicesTableLib
|
||||
UefiLib
|
||||
MemoryAllocationLib
|
||||
BaseMemoryLib
|
||||
BaseLib
|
||||
DebugLib
|
||||
DevicePathLib
|
||||
IoLib
|
||||
PciLib
|
||||
QemuFwCfgLib
|
||||
|
||||
[Sources]
|
||||
PciHostBridge.c
|
||||
PciRootBridgeIo.c
|
||||
PciHostBridge.h
|
||||
IoFifo.h
|
||||
|
||||
[Sources.IA32]
|
||||
Ia32/IoFifo.nasm
|
||||
|
||||
[Sources.X64]
|
||||
X64/IoFifo.nasm
|
||||
|
||||
[Protocols]
|
||||
gEfiPciHostBridgeResourceAllocationProtocolGuid ## PRODUCES
|
||||
gEfiPciRootBridgeIoProtocolGuid ## PRODUCES
|
||||
gEfiMetronomeArchProtocolGuid ## CONSUMES
|
||||
gEfiDevicePathProtocolGuid ## PRODUCES
|
||||
|
||||
[depex]
|
||||
gEfiMetronomeArchProtocolGuid
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,125 +0,0 @@
|
|||
;------------------------------------------------------------------------------
|
||||
;
|
||||
; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
|
||||
;
|
||||
; This program and the accompanying materials are licensed and made available
|
||||
; under the terms and conditions of the BSD License which accompanies this
|
||||
; distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php.
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
DEFAULT REL
|
||||
SECTION .text
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; VOID
|
||||
; EFIAPI
|
||||
; IoReadFifo8 (
|
||||
; IN UINTN Port, // rcx
|
||||
; IN UINTN Size, // rdx
|
||||
; IN VOID *Buffer // r8
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
global ASM_PFX(IoReadFifo8)
|
||||
ASM_PFX(IoReadFifo8):
|
||||
cld
|
||||
xchg rcx, rdx
|
||||
xchg rdi, r8 ; rdi: buffer address; r8: save rdi
|
||||
rep insb
|
||||
mov rdi, r8 ; restore rdi
|
||||
ret
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; VOID
|
||||
; EFIAPI
|
||||
; IoReadFifo16 (
|
||||
; IN UINTN Port, // rcx
|
||||
; IN UINTN Size, // rdx
|
||||
; IN VOID *Buffer // r8
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
global ASM_PFX(IoReadFifo16)
|
||||
ASM_PFX(IoReadFifo16):
|
||||
cld
|
||||
xchg rcx, rdx
|
||||
xchg rdi, r8 ; rdi: buffer address; r8: save rdi
|
||||
rep insw
|
||||
mov rdi, r8 ; restore rdi
|
||||
ret
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; VOID
|
||||
; EFIAPI
|
||||
; IoReadFifo32 (
|
||||
; IN UINTN Port, // rcx
|
||||
; IN UINTN Size, // rdx
|
||||
; IN VOID *Buffer // r8
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
global ASM_PFX(IoReadFifo32)
|
||||
ASM_PFX(IoReadFifo32):
|
||||
cld
|
||||
xchg rcx, rdx
|
||||
xchg rdi, r8 ; rdi: buffer address; r8: save rdi
|
||||
rep insd
|
||||
mov rdi, r8 ; restore rdi
|
||||
ret
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; VOID
|
||||
; EFIAPI
|
||||
; IoWriteFifo8 (
|
||||
; IN UINTN Port, // rcx
|
||||
; IN UINTN Size, // rdx
|
||||
; IN VOID *Buffer // r8
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
global ASM_PFX(IoWriteFifo8)
|
||||
ASM_PFX(IoWriteFifo8):
|
||||
cld
|
||||
xchg rcx, rdx
|
||||
xchg rsi, r8 ; rsi: buffer address; r8: save rsi
|
||||
rep outsb
|
||||
mov rsi, r8 ; restore rsi
|
||||
ret
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; VOID
|
||||
; EFIAPI
|
||||
; IoWriteFifo16 (
|
||||
; IN UINTN Port, // rcx
|
||||
; IN UINTN Size, // rdx
|
||||
; IN VOID *Buffer // r8
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
global ASM_PFX(IoWriteFifo16)
|
||||
ASM_PFX(IoWriteFifo16):
|
||||
cld
|
||||
xchg rcx, rdx
|
||||
xchg rsi, r8 ; rsi: buffer address; r8: save rsi
|
||||
rep outsw
|
||||
mov rsi, r8 ; restore rsi
|
||||
ret
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; VOID
|
||||
; EFIAPI
|
||||
; IoWriteFifo32 (
|
||||
; IN UINTN Port, // rcx
|
||||
; IN UINTN Size, // rdx
|
||||
; IN VOID *Buffer // r8
|
||||
; );
|
||||
;------------------------------------------------------------------------------
|
||||
global ASM_PFX(IoWriteFifo32)
|
||||
ASM_PFX(IoWriteFifo32):
|
||||
cld
|
||||
xchg rcx, rdx
|
||||
xchg rsi, r8 ; rsi: buffer address; r8: save rsi
|
||||
rep outsd
|
||||
mov rsi, r8 ; restore rsi
|
||||
ret
|
||||
|
||||
Loading…
Reference in New Issue