mirror of https://github.com/acidanthera/audk.git
Fixup to point to real RAM and NOR addressess.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10511 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
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@ -300,14 +300,14 @@
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gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|10
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gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
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gEmbeddedTokenSpaceGuid.PcdPrePiHobBase|0x80001000
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gEmbeddedTokenSpaceGuid.PcdPrePiStackBase|0x87FE0000 # stack at top of memory
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gEmbeddedTokenSpaceGuid.PcdPrePiHobBase|0x00001000
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gEmbeddedTokenSpaceGuid.PcdPrePiStackBase|0x07FE0000 # stack at top of memory
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gEmbeddedTokenSpaceGuid.PcdPrePiStackSize|0x20000 # 128K stack
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gEmbeddedTokenSpaceGuid.PcdMemoryBase|0x80000000
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gEmbeddedTokenSpaceGuid.PcdMemorySize|0x10000000
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gEmbeddedTokenSpaceGuid.PcdMemoryBase|0x00000000
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gEmbeddedTokenSpaceGuid.PcdMemorySize|0x10000000 # 256 MB
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gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x80000000
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gArmTokenSpaceGuid.PcdCpuResetAddress|0x80008000
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gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000
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gArmTokenSpaceGuid.PcdCpuResetAddress|0x40000000 # set to start of NOR
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gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000
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gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterPeriodInNanoseconds|77
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@ -27,12 +27,11 @@
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[FD.ArmEb_EFI]
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####BaseAddress = 0x80208000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress #The base address of the FLASH Device.
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BaseAddress = 0x80008000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress #The base address of the FLASH Device.
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Size = 0x00080000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize #The size in bytes of the FLASH Device
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BaseAddress = 0x40000000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress #The base address of the FLASH Device.
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Size = 0x00200000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize #The size in bytes of the FLASH Device
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ErasePolarity = 1
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BlockSize = 0x40
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NumBlocks = 0x2000
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BlockSize = 0x00001000
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NumBlocks = 0x200
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################################################################################
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#
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@ -50,10 +49,7 @@ NumBlocks = 0x2000
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#
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################################################################################
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# 512 bytes of configuration header & 8 bytes of image header
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0x00000000|0x00000208
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0x00000208|0x0007FDF8
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0x00000000|0x00200000
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gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase|gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
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FV = FVMAIN_COMPACT
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@ -1,5 +1,11 @@
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#------------------------------------------------------------------------------
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#
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# ARM EB Entry point. Reset vector in FV header will brach to
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# _ModuleEntryPoint.
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#
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# We use crazy macros, like LoadConstantToReg, since Xcode assembler
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# does not support = assembly syntax for ldr.
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#
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# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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@ -13,7 +19,9 @@
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#------------------------------------------------------------------------------
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <ArmEb/ArmEb.h>
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.text
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.align 3
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@ -22,29 +30,49 @@
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.globl ASM_PFX(_ModuleEntryPoint)
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ASM_PFX(_ModuleEntryPoint):
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// Turn off remapping NOR to 0. We can now use DRAM in low memory
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MmioOr32 (EB_SP810_CTRL_BASE ,BIT8)
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// Enable NEON register in case folks want to use them for optimizations (CopyMem)
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mrc p15, 0, r0, c1, c0, 2
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orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
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mcr p15, 0, r0, c1, c0, 2
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mov r0, #0x40000000 // Set EN bit in FPEXC
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msr FPEXC,r0
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// Set CPU vectors to start of DRAM
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LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
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mcr p15, 0, r0, c12, c0, 0
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isb // Sync changes to control registers
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// Fill vector table with branchs to current pc (jmp $)
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// CPU DXE driver likes known values so it can let GDB stub hook vectors
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ldr r1, ShouldNeverGetHere
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movs r2, #0
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FillVectors
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str r1, [r0, r2]
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adds r2, r2, #4
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cmp r2, #32
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bne FillVectors
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//
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// Set stack based on PCD values. Need to do it this way to make C code work
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// when it runs from FLASH.
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//
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LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) /* stack base arg2 */
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LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) /* stack size arg3 */
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LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
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LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
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add r4, r2, r3
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//Enter SVC mode and set up SVC stack pointer
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mov r0,#0x13|0x80|0x40
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msr CPSR_c,r0
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sub r4, r4, #0x400
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mov r13,r4
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mov r13, r4
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// Call C entry point
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LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) /* memory size arg1 */
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LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) /* memory size arg0 */
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blx ASM_PFX(CEntryPoint) /* Assume C code is ARM */
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LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
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LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0
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blx ASM_PFX(CEntryPoint)
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ShouldNeverGetHere:
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/* _CEntryPoint should never return */
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// _CEntryPoint should never return
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b ShouldNeverGetHere
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@ -13,8 +13,11 @@
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//------------------------------------------------------------------------------
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <ArmEb/ArmEb.h>
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#include <AutoGen.h>
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INCLUDE AsmMacroIoLib.inc
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IMPORT CEntryPoint
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_ModuleEntryPoint
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// Turn off remapping NOR to 0. We can now use DRAM in low memory
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MmioOr32 (0x10001000 ,BIT8) //EB_SP810_CTRL_BASE
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// Enable NEON register in case folks want to use them for optimizations (CopyMem)
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mrc p15, 0, r0, c1, c0, 2
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orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
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mcr p15, 0, r0, c1, c0, 2
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mov r0, #0x40000000 // Set EN bit in FPEXC
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msr FPEXC,r0
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// Set CPU vectors to start of DRAM
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LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
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mcr p15, 0, r0, c12, c0, 0
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isb // Sync changes to control registers
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// Fill vector table with branchs to current pc (jmp $)
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// CPU DXE driver likes known values so it can let GDB stub hook vectors
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ldr r1, ShouldNeverGetHere
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movs r2, #0
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FillVectors
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str r1, [r0, r2]
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adds r2, r2, #4
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cmp r2, #32
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bne FillVectors
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//
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// Set stack based on PCD values. Need to do it this way to make C code work
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// when it runs from FLASH.
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//
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LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) /* stack base arg2 */
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LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) /* stack size arg3 */
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LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
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LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
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add r4, r2, r3
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//Enter SVC mode and set up SVC stack pointer
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mov r0,#0x13|0x80|0x40
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msr CPSR_c,r0
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mov r13,r4
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mov r13, r4
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// Call C entry point
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LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) /* memory size arg1 */
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LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) /* memory size arg0 */
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blx CEntryPoint /* Assume C code is thumb */
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LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
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LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory size arg0
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blx CEntryPoint
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ShouldNeverGetHere
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/* _CEntryPoint should never return */
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// _CEntryPoint should never return
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b ShouldNeverGetHere
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END
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gEmbeddedTokenSpaceGuid.PcdPrePiStackBase
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gEmbeddedTokenSpaceGuid.PcdMemoryBase
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gEmbeddedTokenSpaceGuid.PcdMemorySize
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gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
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