UefiCpuPkg/SmmCpuFeaturesLib: replace hard-coded machine code

Replace hard-coded machine code with equivalent assembly source code.
Changes tested by checking for machine code equivalence by disassembling
the original and changed code.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chris Ruffin <chris.ruffin@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
This commit is contained in:
Chris Ruffin 2017-09-28 09:51:44 +08:00 committed by Eric Dong
parent 94744aa2ce
commit 4c34a8ea19
4 changed files with 34 additions and 29 deletions

View File

@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ; ;------------------------------------------------------------------------------ ;
; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR> ; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials ; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -51,6 +51,11 @@ global ASM_PFX(gStmSmbase)
global ASM_PFX(gStmXdSupported) global ASM_PFX(gStmXdSupported)
extern ASM_PFX(gStmSmiHandlerIdtr) extern ASM_PFX(gStmSmiHandlerIdtr)
ASM_PFX(gStmSmiCr3) EQU StmSmiCr3Patch - 4
ASM_PFX(gStmSmiStack) EQU StmSmiStackPatch - 4
ASM_PFX(gStmSmbase) EQU StmSmbasePatch - 4
ASM_PFX(gStmXdSupported) EQU StmXdSupportedPatch - 1
SECTION .text SECTION .text
BITS 16 BITS 16
@ -66,8 +71,8 @@ _StmSmiEntryPoint:
o32 lgdt [cs:bx] ; lgdt fword ptr cs:[bx] o32 lgdt [cs:bx] ; lgdt fword ptr cs:[bx]
mov ax, PROTECT_MODE_CS mov ax, PROTECT_MODE_CS
mov [cs:bx-0x2],ax mov [cs:bx-0x2],ax
DB 0x66, 0xbf ; mov edi, SMBASE o32 mov edi, strict dword 0
ASM_PFX(gStmSmbase): DD 0 StmSmbasePatch:
lea eax, [edi + (@32bit - _StmSmiEntryPoint) + 0x8000] lea eax, [edi + (@32bit - _StmSmiEntryPoint) + 0x8000]
mov [cs:bx-0x6],eax mov [cs:bx-0x6],eax
mov ebx, cr0 mov ebx, cr0
@ -87,15 +92,15 @@ o16 mov es, ax
o16 mov fs, ax o16 mov fs, ax
o16 mov gs, ax o16 mov gs, ax
o16 mov ss, ax o16 mov ss, ax
DB 0xbc ; mov esp, imm32 mov esp, strict dword 0
ASM_PFX(gStmSmiStack): DD 0 StmSmiStackPatch:
mov eax, ASM_PFX(gStmSmiHandlerIdtr) mov eax, ASM_PFX(gStmSmiHandlerIdtr)
lidt [eax] lidt [eax]
jmp ProtFlatMode jmp ProtFlatMode
ProtFlatMode: ProtFlatMode:
DB 0xb8 ; mov eax, imm32 mov eax, strict dword 0
ASM_PFX(gStmSmiCr3): DD 0 StmSmiCr3Patch:
mov cr3, eax mov cr3, eax
; ;
; Need to test for CR4 specific bit support ; Need to test for CR4 specific bit support
@ -134,8 +139,8 @@ ASM_PFX(gStmSmiCr3): DD 0
.6: .6:
; enable NXE if supported ; enable NXE if supported
DB 0b0h ; mov al, imm8 mov al, strict byte 1
ASM_PFX(gStmXdSupported): DB 1 StmXdSupportedPatch:
cmp al, 0 cmp al, 0
jz @SkipXd jz @SkipXd
; ;
@ -268,4 +273,3 @@ _StmSmiHandler:
ASM_PFX(gcStmSmiHandlerSize) : DW $ - _StmSmiEntryPoint ASM_PFX(gcStmSmiHandlerSize) : DW $ - _StmSmiEntryPoint
ASM_PFX(gcStmSmiHandlerOffset) : DW _StmSmiHandler - _StmSmiEntryPoint ASM_PFX(gcStmSmiHandlerOffset) : DW _StmSmiHandler - _StmSmiEntryPoint

View File

@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ; ;------------------------------------------------------------------------------ ;
; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR> ; Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials ; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -87,7 +87,7 @@ ASM_PFX(OnException):
mov ebx, eax mov ebx, eax
mov eax, 4 mov eax, 4
DB 0x0f, 0x01, 0x0c1 ; VMCALL vmcall
jmp $ jmp $
global ASM_PFX(OnStmSetup) global ASM_PFX(OnStmSetup)
@ -173,4 +173,3 @@ ASM_PFX(OnStmTeardown):
.72: .72:
rsm rsm

View File

@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ; ;------------------------------------------------------------------------------ ;
; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR> ; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials ; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -61,6 +61,11 @@ global ASM_PFX(gcStmSmiHandlerTemplate)
global ASM_PFX(gcStmSmiHandlerSize) global ASM_PFX(gcStmSmiHandlerSize)
global ASM_PFX(gcStmSmiHandlerOffset) global ASM_PFX(gcStmSmiHandlerOffset)
ASM_PFX(gStmSmbase) EQU StmSmbasePatch - 4
ASM_PFX(gStmSmiStack) EQU StmSmiStackPatch - 4
ASM_PFX(gStmSmiCr3) EQU StmSmiCr3Patch - 4
ASM_PFX(gStmXdSupported) EQU StmXdSupportedPatch - 1
DEFAULT REL DEFAULT REL
SECTION .text SECTION .text
@ -76,8 +81,8 @@ _StmSmiEntryPoint:
o32 lgdt [cs:bx] ; lgdt fword ptr cs:[bx] o32 lgdt [cs:bx] ; lgdt fword ptr cs:[bx]
mov ax, PROTECT_MODE_CS mov ax, PROTECT_MODE_CS
mov [cs:bx-0x2],ax mov [cs:bx-0x2],ax
DB 0x66, 0xbf ; mov edi, SMBASE o32 mov edi, strict dword 0
ASM_PFX(gStmSmbase): DD 0 StmSmbasePatch:
lea eax, [edi + (@ProtectedMode - _StmSmiEntryPoint) + 0x8000] lea eax, [edi + (@ProtectedMode - _StmSmiEntryPoint) + 0x8000]
mov [cs:bx-0x6],eax mov [cs:bx-0x6],eax
mov ebx, cr0 mov ebx, cr0
@ -97,14 +102,14 @@ o16 mov es, ax
o16 mov fs, ax o16 mov fs, ax
o16 mov gs, ax o16 mov gs, ax
o16 mov ss, ax o16 mov ss, ax
DB 0xbc ; mov esp, imm32 mov esp, strict dword 0
ASM_PFX(gStmSmiStack): DD 0 StmSmiStackPatch:
jmp ProtFlatMode jmp ProtFlatMode
BITS 64 BITS 64
ProtFlatMode: ProtFlatMode:
DB 0xb8 ; mov eax, offset gStmSmiCr3 mov eax, strict dword 0
ASM_PFX(gStmSmiCr3): DD 0 StmSmiCr3Patch:
mov cr3, rax mov cr3, rax
mov eax, 0x668 ; as cr4.PGE is not set here, refresh cr3 mov eax, 0x668 ; as cr4.PGE is not set here, refresh cr3
mov cr4, rax ; in PreModifyMtrrs() to flush TLB. mov cr4, rax ; in PreModifyMtrrs() to flush TLB.
@ -119,8 +124,8 @@ ASM_PFX(gStmSmiCr3): DD 0
ltr ax ltr ax
; enable NXE if supported ; enable NXE if supported
DB 0xb0 ; mov al, imm8 mov al, strict byte 1
ASM_PFX(gStmXdSupported): DB 1 StmXdSupportedPatch:
cmp al, 0 cmp al, 0
jz @SkipXd jz @SkipXd
; ;
@ -178,8 +183,7 @@ CommonHandler:
; Save FP registers ; Save FP registers
; ;
sub rsp, 0x200 sub rsp, 0x200
DB 0x48 ; FXSAVE64 fxsave64 [rsp]
fxsave [rsp]
add rsp, -0x20 add rsp, -0x20
@ -200,8 +204,7 @@ CommonHandler:
; ;
; Restore FP registers ; Restore FP registers
; ;
DB 0x48 ; FXRSTOR64 fxrstor64 [rsp]
fxrstor [rsp]
add rsp, 0x200 add rsp, 0x200

View File

@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ; ;------------------------------------------------------------------------------ ;
; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR> ; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials ; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -86,7 +86,7 @@ ASM_PFX(OnException):
add rsp, 0x28 add rsp, 0x28
mov ebx, eax mov ebx, eax
mov eax, 4 mov eax, 4
DB 0x0f, 0x01, 0x0c1 ; VMCALL vmcall
jmp $ jmp $
global ASM_PFX(OnStmSetup) global ASM_PFX(OnStmSetup)
@ -176,4 +176,3 @@ ASM_PFX(OnStmTeardown):
.12: .12:
rsm rsm