mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg: Uses gMmst in MmSaveStateLib
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182 Use gMmst instead of gSmst. Replace SmmServicesTableLib with MmServicesTableLib. Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Abner Chang <abner.chang@amd.com> Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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@ -108,7 +108,7 @@ MmSaveStateReadRegister (
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UINT8 DataWidth;
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// Read CPU State
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CpuSaveState = (AMD_SMRAM_SAVE_STATE_MAP *)gSmst->CpuSaveState[CpuIndex];
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CpuSaveState = (AMD_SMRAM_SAVE_STATE_MAP *)gMmst->CpuSaveState[CpuIndex];
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// Check for special EFI_MM_SAVE_STATE_REGISTER_LMA
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if (Register == EFI_MM_SAVE_STATE_REGISTER_LMA) {
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@ -226,7 +226,7 @@ MmSaveStateWriteRegister (
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return EFI_NOT_FOUND;
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}
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CpuSaveState = gSmst->CpuSaveState[CpuIndex];
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CpuSaveState = gMmst->CpuSaveState[CpuIndex];
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//
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// Do not write non-writable SaveState, because it will cause exception.
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@ -31,4 +31,4 @@
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BaseLib
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BaseMemoryLib
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DebugLib
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SmmServicesTableLib
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MmServicesTableLib
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@ -296,7 +296,7 @@ MmSaveStateWriteRegister (
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return EFI_NOT_FOUND;
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}
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CpuSaveState = gSmst->CpuSaveState[CpuIndex];
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CpuSaveState = gMmst->CpuSaveState[CpuIndex];
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//
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// Do not write non-writable SaveState, because it will cause exception.
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@ -31,4 +31,4 @@
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BaseLib
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BaseMemoryLib
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DebugLib
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SmmServicesTableLib
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MmServicesTableLib
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@ -14,7 +14,7 @@
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#include <Protocol/MmCpu.h>
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#include <Library/DebugLib.h>
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#include <Library/MmSaveStateLib.h>
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#include <Library/SmmServicesTableLib.h>
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#include <Library/MmServicesTableLib.h>
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#include <Library/BaseMemoryLib.h>
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// Macro used to simplify the lookup table entries of type CPU_MM_SAVE_STATE_REGISTER_RANGE
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@ -99,8 +99,8 @@ MmSaveStateReadRegisterByIndex (
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//
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// Write return buffer
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//
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ASSERT (gSmst->CpuSaveState[CpuIndex] != NULL);
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CopyMem (Buffer, (UINT8 *)gSmst->CpuSaveState[CpuIndex] + mCpuWidthOffset[RegisterIndex].Offset32, Width);
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ASSERT (gMmst->CpuSaveState[CpuIndex] != NULL);
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CopyMem (Buffer, (UINT8 *)gMmst->CpuSaveState[CpuIndex] + mCpuWidthOffset[RegisterIndex].Offset32, Width);
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} else {
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//
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// If 64-bit mode width is zero, then the specified register can not be accessed
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@ -119,12 +119,12 @@ MmSaveStateReadRegisterByIndex (
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//
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// Write lower 32-bits of return buffer
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//
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CopyMem (Buffer, (UINT8 *)gSmst->CpuSaveState[CpuIndex] + mCpuWidthOffset[RegisterIndex].Offset64Lo, MIN (4, Width));
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CopyMem (Buffer, (UINT8 *)gMmst->CpuSaveState[CpuIndex] + mCpuWidthOffset[RegisterIndex].Offset64Lo, MIN (4, Width));
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if (Width > 4) {
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//
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// Write upper 32-bits of return buffer
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//
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CopyMem ((UINT8 *)Buffer + 4, (UINT8 *)gSmst->CpuSaveState[CpuIndex] + mCpuWidthOffset[RegisterIndex].Offset64Hi, Width - 4);
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CopyMem ((UINT8 *)Buffer + 4, (UINT8 *)gMmst->CpuSaveState[CpuIndex] + mCpuWidthOffset[RegisterIndex].Offset64Hi, Width - 4);
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}
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}
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