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IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete.

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PciEnumerationComplete might be signaled to FSP in Coreboot. So FSP
wrapper driver don't need send it again. Add a PCD to control if a
FSP API could be skipped from FspWrapperNotifyDxe driver.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
This commit is contained in:
Dong, Guo 2016-10-26 07:53:37 +08:00 committed by Jiewen Yao
parent d1b757e2cd
commit 4d4b81697c
3 changed files with 33 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
View File

@ -27,6 +27,8 @@
#include <Library/HobLib.h> #include <Library/HobLib.h>
#include <FspStatusCode.h> #include <FspStatusCode.h>
#define FSP_API_NOTIFY_PHASE_AFTER_PCI_ENUMERATION BIT16
typedef typedef
EFI_STATUS EFI_STATUS
(EFIAPI * ADD_PERFORMANCE_RECORDS)( (EFIAPI * ADD_PERFORMANCE_RECORDS)(
@ -236,6 +238,7 @@ FspWrapperNotifyDxeEntryPoint (
EFI_EVENT ReadyToBootEvent; EFI_EVENT ReadyToBootEvent;
VOID *Registration; VOID *Registration;
EFI_EVENT ProtocolNotifyEvent; EFI_EVENT ProtocolNotifyEvent;
UINT32 FspApiMask;
// //
// Load this driver's image to memory // Load this driver's image to memory
@ -245,6 +248,8 @@ FspWrapperNotifyDxeEntryPoint (
return EFI_SUCCESS; return EFI_SUCCESS;
} }
FspApiMask = PcdGet32 (PcdSkipFspApi);
if ((FspApiMask & FSP_API_NOTIFY_PHASE_AFTER_PCI_ENUMERATION) == 0) {
ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent ( ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent (
&gEfiPciEnumerationCompleteProtocolGuid, &gEfiPciEnumerationCompleteProtocolGuid,
TPL_CALLBACK, TPL_CALLBACK,
@ -253,6 +258,7 @@ FspWrapperNotifyDxeEntryPoint (
&Registration &Registration
); );
ASSERT (ProtocolNotifyEvent != NULL); ASSERT (ProtocolNotifyEvent != NULL);
}
Status = EfiCreateEventReadyToBootEx ( Status = EfiCreateEventReadyToBootEx (
TPL_CALLBACK, TPL_CALLBACK,

1
IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
View File

@ -62,6 +62,7 @@
[Pcd] [Pcd]
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES
gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi ## CONSUMES
[Depex] [Depex]
TRUE TRUE

18
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
View File

@ -75,6 +75,24 @@
gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300 gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300
gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00000301 gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00000301
## This PCD indicates if FSP APIs are skipped from FSP wrapper.<BR><BR>
# If a bit is set, that means this FSP API is skipped.<BR>
# If a bit is clear, that means this FSP API is NOT skipped.<BR>
# NOTE: Only NotifyPhase Post PCI enumeration (BIT16) is implemented.<BR>
# BIT[15:0] is for function:<BR>
# BIT0 - Skip TempRamInit<BR>
# BIT1 - Skip MemoryInit<BR>
# BIT2 - Skip TempRamExit<BR>
# BIT3 - Skip SiliconInit<BR>
# BIT4 - Skip NotifyPhase<BR>
# BIT[32:16] is for sub-function:<BR>
# BIT16 - Skip NotifyPhase (AfterPciEnumeration)<BR>
# BIT17 - Skip NotifyPhase (ReadyToBoot)<BR>
# BIT18 - Skip NotifyPhase (EndOfFirmware)<BR>
# Any undefined BITs are reserved for future use.<BR>
# @Prompt Skip FSP API from FSP wrapper.
gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x40000009
[PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx] [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001 gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001