tyler.durden
/
audk
mirror of https://github.com/acidanthera/audk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

UefiCpuPkg/CpuCacheInfoLib: Sort CpuCacheInfo array 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3508

Sort the CpuCacheInfo array by CPU package ID, core type, cache level
and cache type.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
This commit is contained in:
Lou, Yun 2021-08-06 22:37:13 +08:00 committed by mergify[bot]
parent 97fdcbda4e
commit 4de77ae989
5 changed files with 80 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
UefiCpuPkg/Include/Library/CpuCacheInfoLib.h
View File

@ -59,7 +59,7 @@ typedef struct {
} CPU_CACHE_INFO;
/**
Get CpuCacheInfo data array.
Get CpuCacheInfo data array. The array is sorted by CPU package ID, core type, cache level and cache type.
@param[in, out] CpuCacheInfo Pointer to the CpuCacheInfo array.
@param[in, out] CpuCacheInfoCount As input, point to the length of response CpuCacheInfo array.

47
UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c
View File

@ -37,6 +37,47 @@ CpuCacheInfoPrintCpuCacheInfoTable (
DEBUG ((DEBUG_INFO, "+-------+--------------------------------------------------------------------------------------+\n"));
}
/**
Function to compare CPU package ID, core type, cache level and cache type for use in QuickSort.
@param[in] Buffer1 pointer to CPU_CACHE_INFO poiner to compare
@param[in] Buffer2 pointer to second CPU_CACHE_INFO pointer to compare
@retval 0 Buffer1 equal to Buffer2
@retval 1 Buffer1 is greater than Buffer2
@retval -1 Buffer1 is less than Buffer2
**/
INTN
EFIAPI
CpuCacheInfoCompare (
IN CONST VOID *Buffer1,
IN CONST VOID *Buffer2
)
{
CPU_CACHE_INFO_COMPARATOR Comparator1, Comparator2;
ZeroMem (&Comparator1, sizeof (Comparator1));
ZeroMem (&Comparator2, sizeof (Comparator2));
Comparator1.Bits.Package = ((CPU_CACHE_INFO*)Buffer1)->Package;
Comparator1.Bits.CoreType = ((CPU_CACHE_INFO*)Buffer1)->CoreType;
Comparator1.Bits.CacheLevel = ((CPU_CACHE_INFO*)Buffer1)->CacheLevel;
Comparator1.Bits.CacheType = ((CPU_CACHE_INFO*)Buffer1)->CacheType;
Comparator2.Bits.Package = ((CPU_CACHE_INFO*)Buffer2)->Package;
Comparator2.Bits.CoreType = ((CPU_CACHE_INFO*)Buffer2)->CoreType;
Comparator2.Bits.CacheLevel = ((CPU_CACHE_INFO*)Buffer2)->CacheLevel;
Comparator2.Bits.CacheType = ((CPU_CACHE_INFO*)Buffer2)->CacheType;
if (Comparator1.Uint64 == Comparator2.Uint64) {
return 0;
} else if (Comparator1.Uint64 > Comparator2.Uint64) {
return 1;
} else {
return -1;
}
}
/**
Get the total number of package and package ID in the platform.
@ -325,6 +366,10 @@ CpuCacheInfoCollectCpuCacheInfoData (
if (*CacheInfoCount < LocalCacheInfoCount) {
Status = EFI_BUFFER_TOO_SMALL;
} else {
//
// Sort LocalCacheInfo array by CPU package ID, core type, cache level and cache type.
//
PerformQuickSort (LocalCacheInfo, LocalCacheInfoCount, sizeof (*LocalCacheInfo), (SORT_COMPARE) CpuCacheInfoCompare);
CopyMem (CacheInfo, LocalCacheInfo, sizeof (*CacheInfo) * LocalCacheInfoCount);
DEBUG_CODE (
CpuCacheInfoPrintCpuCacheInfoTable (CacheInfo, LocalCacheInfoCount);
@ -340,7 +385,7 @@ CpuCacheInfoCollectCpuCacheInfoData (
}
/**
Get CpuCacheInfo data array.
Get CpuCacheInfo data array. The array is sorted by CPU package ID, core type, cache level and cache type.
@param[in, out] CpuCacheInfo Pointer to the CpuCacheInfo array.
@param[in, out] CpuCacheInfoCount As input, point to the length of response CpuCacheInfo array.

4
UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf
View File

@ -3,7 +3,7 @@
#
# Provides cache info for each package, core type, cache level and cache type.
#
# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@ -25,6 +25,7 @@
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
UefiCpuPkg/UefiCpuPkg.dec
[LibraryClasses]
@ -33,6 +34,7 @@
BaseMemoryLib
MemoryAllocationLib
UefiBootServicesTableLib
SortLib
[Protocols]
gEfiMpServiceProtocolGuid

27
UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h
View File

@ -17,8 +17,35 @@
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/SortLib.h>
#include <Library/CpuCacheInfoLib.h>
typedef union {
struct {
//
// Type of the cache that this package's this type of logical processor corresponds to.
// Value = CPUID.04h:EAX[04:00]
//
UINT32 CacheType : 5;
//
// Level of the cache that this package's this type of logical processor corresponds to.
// Value = CPUID.04h:EAX[07:05]
//
UINT32 CacheLevel : 3;
//
// Core type of logical processor.
// Value = CPUID.1Ah:EAX[31:24]
//
UINT32 CoreType : 8;
UINT32 Reserved : 16;
//
// Package number.
//
UINT32 Package;
} Bits;
UINT64 Uint64;
} CPU_CACHE_INFO_COMPARATOR;
typedef struct {
//
// Package ID, the information comes from

4
UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf
View File

@ -3,7 +3,7 @@
#
# Provides cache info for each package, core type, cache level and cache type.
#
# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@ -25,6 +25,7 @@
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
UefiCpuPkg/UefiCpuPkg.dec
[LibraryClasses]
@ -33,6 +34,7 @@
BaseMemoryLib
MemoryAllocationLib
PeiServicesTablePointerLib
SortLib
[Ppis]
gEdkiiPeiMpServices2PpiGuid