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OvmfPkg: Factor out platform detection (q35 vs. piix4)

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Introduce macros to detect the underlying platform and access its
ACPI power management registers, based on querying the host bridge
device ID.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16372 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Gabriel Somlo 2014-11-14 00:37:16 +00:00 committed by jljusten
parent 4a50c27285
commit 4e48c72c4c
1 changed files with 49 additions and 0 deletions
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49
OvmfPkg/Include/OvmfPlatforms.h Normal file
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/** @file
OVMF Platform definitions
Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>
This program and the accompanying materials are licensed and made
available under the terms and conditions of the BSD License which
accompanies this distribution. The full text of the license may
be found at http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __OVMF_PLATFORMS_H__
#define __OVMF_PLATFORMS_H__
#include <Library/PciLib.h>
#include <IndustryStandard/Pci22.h>
//
// Host Bridge Device ID (DID) values for PIIX4 and Q35/MCH
//
#define INTEL_82441_DEVICE_ID 0x1237 // PIIX4
#define INTEL_Q35_MCH_DEVICE_ID 0x29C0 // Q35
//
// OVMF Host Bridge DID Address
//
#define OVMF_HOSTBRIDGE_DID \
PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)
//
// Power Management Device and Function numbers for PIIX4 and Q35/MCH
//
#define OVMF_PM_DEVICE_PIIX4 0x01
#define OVMF_PM_FUNC_PIIX4 0x03
#define OVMF_PM_DEVICE_Q35 0x1f
#define OVMF_PM_FUNC_Q35 0x00
//
// Power Management Register access for PIIX4 and Q35/MCH
//
#define POWER_MGMT_REGISTER_PIIX4(Offset) \
PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_PIIX4, OVMF_PM_FUNC_PIIX4, (Offset))
#define POWER_MGMT_REGISTER_Q35(Offset) \
PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_Q35, OVMF_PM_FUNC_Q35, (Offset))
#endif