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UefiCpuPkg/Cpuid.h: Remove duplicated struct definition for leaf 1FH 

Per SDM CPUID.0BH and CPUID.1FH outputs the same format of data in
EAX/EBX/ECX/EDX except CPUID.1FH reports more level types such as
module, tile, die.

The patch removes the unnecessary duplicated structure definitions
for CPUID.1FH because when the structure definitions for CPUID.0BH
can be used for CPUID.1FH.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Zhiqiang Qin <zhiqiang.qin@intel.com>
This commit is contained in:
Ray Ni 2019-04-04 13:34:21 +08:00
parent f664032e06
commit 516e33972f
2 changed files with 20 additions and 130 deletions
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22
UefiCpuPkg/Application/Cpuid/Cpuid.c
View File

@ -1,7 +1,7 @@
/** @file
UEFI Application to display CPUID leaf information.
Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -1394,26 +1394,26 @@ CpuidV2ExtendedTopologyEnumeration (
VOID
)
{
CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EAX Eax;
CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EBX Ebx;
CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_ECX Ecx;
CPUID_EXTENDED_TOPOLOGY_EAX Eax;
CPUID_EXTENDED_TOPOLOGY_EBX Ebx;
CPUID_EXTENDED_TOPOLOGY_ECX Ecx;
UINT32 Edx;
if (CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION > gMaximumBasicFunction) {
if (CPUID_V2_EXTENDED_TOPOLOGY > gMaximumBasicFunction) {
return;
}
AsmCpuidEx (
CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION,
CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_MAIN_LEAF,
CPUID_V2_EXTENDED_TOPOLOGY,
0,
&Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx
);
Print (L"CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION (Leaf %08x, Sub-Leaf %08x)\n", CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION, CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_MAIN_LEAF);
Print (L"CPUID_V2_EXTENDED_TOPOLOGY (Leaf %08x, Sub-Leaf %08x)\n", CPUID_V2_EXTENDED_TOPOLOGY, 0);
Print (L" EAX:%08x EBX:%08x ECX:%08x EDX:%08x\n", Eax.Uint32, Ebx.Uint32, Ecx.Uint32, Edx);
PRINT_BIT_FIELD (Eax, BitsNum);
PRINT_BIT_FIELD (Ebx, ProcessorsNum);
PRINT_BIT_FIELD (Ecx, LevelNum);
PRINT_BIT_FIELD (Eax, ApicIdShift);
PRINT_BIT_FIELD (Ebx, LogicalProcessors);
PRINT_BIT_FIELD (Ecx, LevelNumber);
PRINT_BIT_FIELD (Ecx, LevelType);
PRINT_VALUE (Edx, x2APICID);
}

126
UefiCpuPkg/Include/Register/Cpuid.h
View File

@ -6,7 +6,7 @@
If a register returned is a single 32-bit value, then a data structure is
not provided for that register.
Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License which accompanies this distribution.
The full text of the license may be found at
@ -3620,130 +3620,20 @@ typedef union {
number of logical processors available to BIOS/OS/Applications may be different from the
value of EBX[15:0], depending on software and platform hardware configurations.
@param EAX CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION (0x1F)
@param ECX CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_MAIN_LEAF (0x0)
@param EAX CPUID_V2_EXTENDED_TOPOLOGY (0x1F)
@param ECX Level number
**/
#define CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION 0x1F
/**
CPUID V2 Extended Topology Enumeration Leaf
@param EAX CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION (0x1F)
@param ECX CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_MAIN_LEAF (0x00)
@retval EAX Returns V2 Extended Topology Enumeration Leaf described by
the type CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EAX.
@retval EBX Returns V2 Extended Topology Enumeration Leaf described by
the type CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EBX.
@retval ECX Returns V2 Extended Topology Enumeration Leaf described by
the type CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_ECX.
@retval EDX Returns x2APIC ID the current logical processor.
<b>Example usage</b>
@code
CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EAX Eax;
CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EBX Ebx;
CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_ECX Ecx;
UINT32 Edx;
AsmCpuidEx (
CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION,
CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_MAIN_LEAF,
&Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx
);
@endcode
**/
#define CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_MAIN_LEAF 0x00
/**
CPUID V2 Extended Topology Enumeration Leaf EAX for CPUID leafs.
**/
typedef union {
///
/// Individual bit fields
///
struct {
///
/// [Bits 4:0] Number of bits to shift right on x2APIC ID to get a unique
/// topology ID of the next level type. All logical processors with the
/// same next level ID share current level.
///
UINT32 BitsNum:5;
///
/// [Bits 31:5] Reserved.
///
UINT32 Reserved:27;
} Bits;
///
/// All bit fields as a 32-bit value
///
UINT32 Uint32;
} CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EAX;
/**
CPUID V2 Extended Topology Enumeration Leaf EBX for CPUID leafs.
**/
typedef union {
///
/// Individual bit fields
///
struct {
///
/// [Bits 15:0] Number of logical processors at this level type. The number
/// reflects configuration as shipped by Intel.
///
UINT32 ProcessorsNum:16;
///
/// [Bits 31:5] Reserved.
///
UINT32 Reserved:16;
} Bits;
///
/// All bit fields as a 32-bit value
///
UINT32 Uint32;
} CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_EBX;
/**
CPUID V2 Extended Topology Enumeration Leaf ECX for CPUID leafs.
**/
typedef union {
///
/// Individual bit fields
///
struct {
///
/// [Bits 7:0] Level number. Same value in ECX input.
///
UINT32 LevelNum:8;
///
/// [Bits 7:0] Level type.
///
UINT32 LevelType:8;
#define CPUID_V2_EXTENDED_TOPOLOGY 0x1F
///
/// [Bits 31:5] Reserved.
///
UINT32 Reserved:16;
} Bits;
///
/// All bit fields as a 32-bit value
///
UINT32 Uint32;
} CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_ECX;
///
/// @{ Define value for CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_ECX.LevelType
/// @{ Define value for CPUID_EXTENDED_TOPOLOGY_ECX.LevelType
/// The value of the "level type" field is not related to level numbers in
/// any way, higher "level type" values do not mean higher levels.
///
#define CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_LEVEL_TYPE_INVALID 0x00
#define CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_LEVEL_TYPE_SMT 0x01
#define CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_LEVEL_TYPE_CORE 0x02
#define CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_LEVEL_TYPE_MODULE 0x03
#define CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_LEVEL_TYPE_TILE 0x04
#define CPUID_V2_EXTENDED_TOPOLOGY_ENUMERATION_LEVEL_TYPE_DIE 0x05
#define CPUID_V2_EXTENDED_TOPOLOGY_LEVEL_TYPE_MODULE 0x03
#define CPUID_V2_EXTENDED_TOPOLOGY_LEVEL_TYPE_TILE 0x04
#define CPUID_V2_EXTENDED_TOPOLOGY_LEVEL_TYPE_DIE 0x05
///
/// @}
///