ArmPkg/ArmLib: Added helper functions for accessing CPU ACTLR

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15396 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin 2014-03-26 19:31:01 +00:00 committed by oliviermartin
parent b7dd4dbd26
commit 52d44f77c2
5 changed files with 109 additions and 5 deletions

View File

@ -625,4 +625,33 @@ ArmWriteHVBar (
IN UINTN HypModeVectorBase
);
//
// Helper functions for accessing CPU ACTLR
//
UINTN
EFIAPI
ArmReadCpuActlr (
VOID
);
VOID
EFIAPI
ArmWriteCpuActlr (
IN UINTN Val
);
VOID
EFIAPI
ArmSetCpuActlrBit (
IN UINTN Bits
);
VOID
EFIAPI
ArmUnsetCpuActlrBit (
IN UINTN Bits
);
#endif // __ARM_LIB__

View File

@ -37,6 +37,10 @@ GCC_ASM_EXPORT (ArmWriteScr)
GCC_ASM_EXPORT (ArmWriteMVBar)
GCC_ASM_EXPORT (ArmCallWFE)
GCC_ASM_EXPORT (ArmCallSEV)
GCC_ASM_EXPORT (ArmReadCpuExCr)
GCC_ASM_EXPORT (ArmWriteCpuExCr)
GCC_ASM_EXPORT (ArmReadCpuActlr)
GCC_ASM_EXPORT (ArmWriteCpuActlr)
#------------------------------------------------------------------------------
@ -196,5 +200,24 @@ ASM_PFX(ArmCallSEV):
sev
ret
ASM_PFX(ArmReadCpuExCr):
mrs x0, S3_1_c15_c2_1
ret
ASM_PFX(ArmWriteCpuExCr):
msr S3_1_c15_c2_1, x0
dsb sy
isb
ret
ASM_PFX(ArmReadCpuActlr):
mrs x0, S3_1_c15_c2_0
ret
ASM_PFX(ArmWriteCpuActlr):
msr S3_1_c15_c2_0, x0
dsb sy
isb
ret
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

View File

@ -47,6 +47,8 @@ GCC_ASM_EXPORT(ArmWriteHVBar)
GCC_ASM_EXPORT(ArmCallWFE)
GCC_ASM_EXPORT(ArmCallSEV)
GCC_ASM_EXPORT(ArmReadSctlr)
GCC_ASM_EXPORT(ArmReadCpuActlr)
GCC_ASM_EXPORT(ArmWriteCpuActlr)
#------------------------------------------------------------------------------
@ -161,7 +163,6 @@ ASM_PFX(ArmWriteHVBar):
mcr p15, 4, r0, c12, c0, 0
bx lr
ASM_PFX(ArmReadMVBar):
mrc p15, 0, r0, c12, c0, 1
bx lr
@ -179,7 +180,17 @@ ASM_PFX(ArmCallSEV):
bx lr
ASM_PFX(ArmReadSctlr):
mrc p15, 0, R0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
bx lr
mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
bx lr
ASM_PFX(ArmReadCpuActlr):
mrc p15, 0, r0, c1, c0, 1
bx lr
ASM_PFX(ArmWriteCpuActlr):
mcr p15, 0, r0, c1, c0, 1
dsb
isb
bx lr
ASM_FUNCTION_REMOVE_IF_UNREFERENCED

View File

@ -47,6 +47,8 @@
EXPORT ArmCallWFE
EXPORT ArmCallSEV
EXPORT ArmReadSctlr
EXPORT ArmReadCpuActlr
EXPORT ArmWriteCpuActlr
AREA ArmLibSupport, CODE, READONLY
@ -179,6 +181,17 @@ ArmCallSEV
ArmReadSctlr
mrc p15, 0, r0, c1, c0, 0 // Read SCTLR into R0 (Read control register configuration data)
bx lr
bx lr
ArmReadCpuActlr
mrc p15, 0, r0, c1, c0, 1
bx lr
ArmWriteCpuActlr
mcr p15, 0, r0, c1, c0, 1
dsb
isb
bx lr
END

View File

@ -1,7 +1,7 @@
/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@ -62,3 +62,31 @@ ArmUnsetAuxCrBit (
val &= ~Bits;
ArmWriteAuxCr(val);
}
//
// Helper functions for accessing CPUACTLR
//
VOID
EFIAPI
ArmSetCpuActlrBit (
IN UINTN Bits
)
{
UINTN Value;
Value = ArmReadCpuActlr ();
Value |= Bits;
ArmWriteCpuActlr (Value);
}
VOID
EFIAPI
ArmUnsetCpuActlrBit (
IN UINTN Bits
)
{
UINTN Value;
Value = ArmReadCpuActlr ();
Value &= ~Bits;
ArmWriteCpuActlr (Value);
}