mirror of https://github.com/acidanthera/audk.git
ArmPkg/ArmLib: Added helper functions for accessing CPU ACTLR
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15396 6f19259b-4bc3-4df7-8a09-765794883524
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@ -625,4 +625,33 @@ ArmWriteHVBar (
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IN UINTN HypModeVectorBase
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);
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//
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// Helper functions for accessing CPU ACTLR
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//
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UINTN
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EFIAPI
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ArmReadCpuActlr (
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VOID
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);
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VOID
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EFIAPI
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ArmWriteCpuActlr (
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IN UINTN Val
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);
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VOID
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EFIAPI
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ArmSetCpuActlrBit (
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IN UINTN Bits
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);
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VOID
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EFIAPI
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ArmUnsetCpuActlrBit (
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IN UINTN Bits
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);
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#endif // __ARM_LIB__
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@ -37,6 +37,10 @@ GCC_ASM_EXPORT (ArmWriteScr)
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GCC_ASM_EXPORT (ArmWriteMVBar)
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GCC_ASM_EXPORT (ArmCallWFE)
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GCC_ASM_EXPORT (ArmCallSEV)
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GCC_ASM_EXPORT (ArmReadCpuExCr)
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GCC_ASM_EXPORT (ArmWriteCpuExCr)
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GCC_ASM_EXPORT (ArmReadCpuActlr)
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GCC_ASM_EXPORT (ArmWriteCpuActlr)
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#------------------------------------------------------------------------------
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@ -196,5 +200,24 @@ ASM_PFX(ArmCallSEV):
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sev
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ret
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ASM_PFX(ArmReadCpuExCr):
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mrs x0, S3_1_c15_c2_1
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ret
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ASM_PFX(ArmWriteCpuExCr):
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msr S3_1_c15_c2_1, x0
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dsb sy
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isb
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ret
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ASM_PFX(ArmReadCpuActlr):
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mrs x0, S3_1_c15_c2_0
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ret
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ASM_PFX(ArmWriteCpuActlr):
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msr S3_1_c15_c2_0, x0
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dsb sy
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isb
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ret
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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@ -47,6 +47,8 @@ GCC_ASM_EXPORT(ArmWriteHVBar)
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GCC_ASM_EXPORT(ArmCallWFE)
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GCC_ASM_EXPORT(ArmCallSEV)
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GCC_ASM_EXPORT(ArmReadSctlr)
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GCC_ASM_EXPORT(ArmReadCpuActlr)
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GCC_ASM_EXPORT(ArmWriteCpuActlr)
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#------------------------------------------------------------------------------
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@ -161,7 +163,6 @@ ASM_PFX(ArmWriteHVBar):
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mcr p15, 4, r0, c12, c0, 0
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bx lr
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ASM_PFX(ArmReadMVBar):
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mrc p15, 0, r0, c12, c0, 1
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bx lr
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@ -179,7 +180,17 @@ ASM_PFX(ArmCallSEV):
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bx lr
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ASM_PFX(ArmReadSctlr):
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mrc p15, 0, R0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
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mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
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bx lr
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ASM_PFX(ArmReadCpuActlr):
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mrc p15, 0, r0, c1, c0, 1
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bx lr
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ASM_PFX(ArmWriteCpuActlr):
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mcr p15, 0, r0, c1, c0, 1
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dsb
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isb
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bx lr
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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@ -47,6 +47,8 @@
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EXPORT ArmCallWFE
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EXPORT ArmCallSEV
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EXPORT ArmReadSctlr
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EXPORT ArmReadCpuActlr
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EXPORT ArmWriteCpuActlr
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AREA ArmLibSupport, CODE, READONLY
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@ -181,4 +183,15 @@ ArmReadSctlr
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mrc p15, 0, r0, c1, c0, 0 // Read SCTLR into R0 (Read control register configuration data)
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bx lr
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ArmReadCpuActlr
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mrc p15, 0, r0, c1, c0, 1
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bx lr
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ArmWriteCpuActlr
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mcr p15, 0, r0, c1, c0, 1
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dsb
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isb
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bx lr
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END
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@ -1,7 +1,7 @@
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/** @file
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
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Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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@ -62,3 +62,31 @@ ArmUnsetAuxCrBit (
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val &= ~Bits;
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ArmWriteAuxCr(val);
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}
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//
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// Helper functions for accessing CPUACTLR
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//
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VOID
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EFIAPI
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ArmSetCpuActlrBit (
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IN UINTN Bits
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)
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{
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UINTN Value;
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Value = ArmReadCpuActlr ();
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Value |= Bits;
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ArmWriteCpuActlr (Value);
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}
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VOID
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EFIAPI
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ArmUnsetCpuActlrBit (
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IN UINTN Bits
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)
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{
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UINTN Value;
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Value = ArmReadCpuActlr ();
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Value &= ~Bits;
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ArmWriteCpuActlr (Value);
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}
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