diff --git a/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/Ata.c b/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/Ata.c
index a91eb174c1..4a57f11bfe 100644
--- a/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/Ata.c
+++ b/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/Ata.c
@@ -2493,9 +2493,9 @@ DoAtaUdma (
                         );
 
     if (UdmaOp == AtaUdmaReadExtOp || UdmaOp == AtaUdmaReadOp) {
-      RegisterValue |= BMIC_nREAD;
+      RegisterValue |= BMIC_NREAD;
     } else {
-      RegisterValue &= ~((UINT8) BMIC_nREAD);
+      RegisterValue &= ~((UINT8) BMIC_NREAD);
     }
 
     IdeDev->PciIo->Io.Write (
diff --git a/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeData.h b/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeData.h
index e4bc4f71fd..47385c71a4 100644
--- a/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeData.h
+++ b/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeData.h
@@ -75,7 +75,7 @@ typedef union {
 typedef union {
   UINT16  AltStatus;      /* when read */
   UINT16  DeviceControl;  /* when write */
-} IDE_AltStatus_OR_DeviceControl;
+} IDE_ALTSTATUS_OR_DEVICECONTROL;
 
 //
 // IDE registers set
@@ -90,7 +90,7 @@ typedef struct {
   UINT16                          Head;
   IDE_CMD_OR_STATUS               Reg;
 
-  IDE_AltStatus_OR_DeviceControl  Alt;
+  IDE_ALTSTATUS_OR_DEVICECONTROL  Alt;
   UINT16                          DriveAddress;
 
   UINT16                          MasterSlave;
@@ -119,7 +119,7 @@ typedef struct {
 //
 // Bus Master Reg
 //
-#define BMIC_nREAD      BIT3
+#define BMIC_NREAD      BIT3
 #define BMIC_START      BIT0
 #define BMIS_INTERRUPT  BIT2
 #define BMIS_ERROR      BIT1
diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
index 506e1803dc..af11143e92 100644
--- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
+++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
@@ -89,7 +89,7 @@ PciCapabilitySupport (
   )
 {
 
-  if (PciIoDevice->Pci.Hdr.Status & EFI_PCI_STATUS_CAPABILITY) {
+  if ((PciIoDevice->Pci.Hdr.Status & EFI_PCI_STATUS_CAPABILITY) != 0) {
     return TRUE;
   }
 
diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
index c3036510ff..092c3b6901 100644
--- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
+++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
@@ -142,7 +142,7 @@ PciRootBridgeEnumerator (
   )
 {
   EFI_STATUS                        Status;
-  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *pConfiguration;
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration;
   UINT8                             SubBusNumber;
   UINT8                             StartBusNumber;
   UINT8                             PaddedBusRange;
@@ -169,7 +169,7 @@ PciRootBridgeEnumerator (
   Status = PciResAlloc->StartBusEnumeration (
                           PciResAlloc,
                           RootBridgeHandle,
-                          (VOID **) &pConfiguration
+                          (VOID **) &Configuration
                           );
 
   if (EFI_ERROR (Status)) {
@@ -179,8 +179,8 @@ PciRootBridgeEnumerator (
   //
   // Get the bus number to start with
   //
-  StartBusNumber = (UINT8) (pConfiguration->AddrRangeMin);
-  PaddedBusRange  = (UINT8) (pConfiguration->AddrRangeMax);
+  StartBusNumber = (UINT8) (Configuration->AddrRangeMin);
+  PaddedBusRange  = (UINT8) (Configuration->AddrRangeMax);
 
   //
   // Initialize the subordinate bus number
@@ -200,7 +200,7 @@ PciRootBridgeEnumerator (
   //
   Status = PciScanBus (
             RootBridgeDev,
-            (UINT8) (pConfiguration->AddrRangeMin),
+            (UINT8) (Configuration->AddrRangeMin),
             &SubBusNumber,
             &PaddedBusRange
             );
@@ -213,7 +213,7 @@ PciRootBridgeEnumerator (
   //
   // Assign max bus number scanned
   //
-  pConfiguration->AddrLen = SubBusNumber - StartBusNumber + 1 + PaddedBusRange;
+  Configuration->AddrLen = SubBusNumber - StartBusNumber + 1 + PaddedBusRange;
 
   //
   // Set bus number
@@ -221,10 +221,10 @@ PciRootBridgeEnumerator (
   Status = PciResAlloc->SetBusNumbers (
                           PciResAlloc,
                           RootBridgeHandle,
-                          pConfiguration
+                          Configuration
                           );
   
-  gBS->FreePool (pConfiguration);
+  gBS->FreePool (Configuration);
   
   if (EFI_ERROR (Status)) {
     return Status;
@@ -606,19 +606,19 @@ GetResourceAllocationStatus (
 
   UINT8                             *Temp;
   UINT64                            ResStatus;
-  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *ptr;
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *ACPIAddressDesc;
 
   Temp = (UINT8 *) AcpiConfig;
 
   while (*Temp == ACPI_ADDRESS_SPACE_DESCRIPTOR) {
 
-    ptr       = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp;
-    ResStatus = ptr->AddrTranslationOffset;
+    ACPIAddressDesc       = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp;
+    ResStatus = ACPIAddressDesc->AddrTranslationOffset;
 
-    switch (ptr->ResType) {
+    switch (ACPIAddressDesc->ResType) {
     case 0:
-      if (ptr->AddrSpaceGranularity == 32) {
-        if (ptr->SpecificFlag == 0x06) {
+      if (ACPIAddressDesc->AddrSpaceGranularity == 32) {
+        if (ACPIAddressDesc->SpecificFlag == 0x06) {
           //
           // Pmem32
           //
@@ -631,8 +631,8 @@ GetResourceAllocationStatus (
         }
       }
 
-      if (ptr->AddrSpaceGranularity == 64) {
-        if (ptr->SpecificFlag == 0x06) {
+      if (ACPIAddressDesc->AddrSpaceGranularity == 64) {
+        if (ACPIAddressDesc->SpecificFlag == 0x06) {
           //
           // PMem64
           //
@@ -1286,7 +1286,7 @@ GetResourceBase (
         // Check to see the granularity
         //
         if (Ptr->AddrSpaceGranularity == 32) {
-          if (Ptr->SpecificFlag & 0x06) {
+          if ((Ptr->SpecificFlag & 0x06) != 0) {
             *PMem32Base = Ptr->AddrRangeMin;
           } else {
             *Mem32Base = Ptr->AddrRangeMin;
@@ -1294,7 +1294,7 @@ GetResourceBase (
         }
 
         if (Ptr->AddrSpaceGranularity == 64) {
-          if (Ptr->SpecificFlag & 0x06) {
+          if ((Ptr->SpecificFlag & 0x06) != 0) {
             *PMem64Base = Ptr->AddrRangeMin;
           } else {
             *Mem64Base = Ptr->AddrRangeMin;
diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
index 7d30797f76..95d8167953 100644
--- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
+++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciHotPlugSupport.c
@@ -66,7 +66,7 @@ EfiCompareDevicePath (
     return FALSE;
   }
 
-  if (CompareMem (DevicePath1, DevicePath2, Size1)) {
+  if (CompareMem (DevicePath1, DevicePath2, Size1) != 0) {
     return FALSE;
   }
 
diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.c
index fd8eaf4325..fca1766d32 100644
--- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.c
+++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.c
@@ -1777,7 +1777,7 @@ PciHostBridgeEnumerator (
   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL   *PciRootBridgeIo;
   UINT16                            MinBus;
   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
-  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *pConfiguration;
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration;
   UINT8                             StartBusNumber;
   LIST_ENTRY                        RootBridgeList;
   LIST_ENTRY                        *Link;
@@ -1846,7 +1846,7 @@ PciHostBridgeEnumerator (
         Status = PciResAlloc->StartBusEnumeration (
                                 PciResAlloc,
                                 RootBridgeHandle,
-                                (VOID **) &pConfiguration
+                                (VOID **) &Configuration
                                 );
         if (EFI_ERROR (Status)) {
           return Status;
@@ -1855,14 +1855,14 @@ PciHostBridgeEnumerator (
         //
         // Get the bus number to start with
         //
-        StartBusNumber  = (UINT8) (pConfiguration->AddrRangeMin);
+        StartBusNumber  = (UINT8) (Configuration->AddrRangeMin);
 
         ResetAllPpbBusNumber (
           RootBridgeDev,
           StartBusNumber
         );
 
-        gBS->FreePool (pConfiguration);
+        gBS->FreePool (Configuration);
         Link = GetNextNode (&RootBridgeList, Link);
         DestroyRootBridge (RootBridgeDev);
       }
diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
index 379a2e4cd4..ea9ac25b13 100644
--- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
+++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciOptionRomSupport.c
@@ -144,7 +144,7 @@ LoadOpRomImage (
   UINT16                    OffsetPcir;
   UINT32                    RomBarOffset;
   UINT32                    RomBar;
-  EFI_STATUS                retStatus;
+  EFI_STATUS                RetStatus;
   BOOLEAN                   FirstCheck;
   UINT8                     *Image;
   PCI_EXPANSION_ROM_HEADER  *RomHeader;
@@ -201,7 +201,7 @@ LoadOpRomImage (
   RomDecode (PciDevice, RomBarIndex, RomBar, TRUE);
 
   RomBarOffset  = RomBar;
-  retStatus     = EFI_NOT_FOUND;
+  RetStatus     = EFI_NOT_FOUND;
   FirstCheck    = TRUE;
 
   do {
@@ -249,7 +249,7 @@ LoadOpRomImage (
   }
 
   if (RomImageSize > 0) {
-    retStatus = EFI_SUCCESS;
+    RetStatus = EFI_SUCCESS;
     Image     = AllocatePool ((UINT32) RomImageSize);
     if (Image == NULL) {
       RomDecode (PciDevice, RomBarIndex, RomBar, FALSE);
@@ -296,7 +296,7 @@ LoadOpRomImage (
   gBS->FreePool (RomHeader);
   gBS->FreePool (RomPcir);
 
-  return retStatus;
+  return RetStatus;
 }
 
 /**
@@ -401,7 +401,7 @@ ProcessOpRomImage (
   UINT8                         *RomBarOffset;
   EFI_HANDLE                    ImageHandle;
   EFI_STATUS                    Status;
-  EFI_STATUS                    retStatus;
+  EFI_STATUS                    RetStatus;
   BOOLEAN                       FirstCheck;
   BOOLEAN                       SkipImage;
   UINT32                        DestinationSize;
@@ -422,7 +422,7 @@ ProcessOpRomImage (
   //
   RomBar        = PciDevice->PciIo.RomImage;
   RomBarOffset  = (UINT8 *) RomBar;
-  retStatus     = EFI_NOT_FOUND;
+  RetStatus     = EFI_NOT_FOUND;
   FirstCheck    = TRUE;
 
   do {
@@ -542,7 +542,7 @@ ProcessOpRomImage (
                 (UINT64) (UINTN) PciDevice->PciIo.RomImage,
                 PciDevice->PciIo.RomSize
                 );
-              retStatus = EFI_SUCCESS;
+              RetStatus = EFI_SUCCESS;
             }
           }
         }
@@ -557,7 +557,7 @@ ProcessOpRomImage (
 
   } while (((Indicator & 0x80) == 0x00) && ((UINTN) (RomBarOffset - (UINT8 *) RomBar) < PciDevice->RomSize));
 
-  return retStatus;
+  return RetStatus;
 
 }
 
diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
index 04d188e9ab..5ebbaf910c 100644
--- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
+++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c
@@ -30,7 +30,7 @@ ResetPowerManagementFeature (
 {
   EFI_STATUS  Status;
   UINT8       PowerManagementRegBlock;
-  UINT16      PMCSR;
+  UINT16      PowerManagementCSR;
 
   PowerManagementRegBlock = 0;
 
@@ -48,7 +48,7 @@ ResetPowerManagementFeature (
   //
   // Turn off the PWE assertion and put the device into D0 State
   //
-  PMCSR = 0x8000;
+  PowerManagementCSR = 0x8000;
 
   //
   // Write PMCSR
@@ -58,7 +58,7 @@ ResetPowerManagementFeature (
                EfiPciIoWidthUint16,
                PowerManagementRegBlock + 4,
                1,
-               &PMCSR
+               &PowerManagementCSR
              );
 
   return EFI_SUCCESS;
diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
index b40b01ea6f..d761832bf6 100644
--- a/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
+++ b/IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
@@ -194,7 +194,7 @@ CalculateApertureIo16 (
   UINT64            Aperture;
   LIST_ENTRY        *CurrentLink;
   PCI_RESOURCE_NODE *Node;
-  UINT64            offset;
+  UINT64            Offset;
   BOOLEAN           IsaEnable;
   BOOLEAN           VGAEnable;
 
@@ -231,11 +231,11 @@ CalculateApertureIo16 (
     //
     // Consider the aperture alignment
     //
-    offset = Aperture & (Node->Alignment);
+    Offset = Aperture & (Node->Alignment);
 
-    if (offset != 0) {
+    if (Offset != 0) {
 
-      Aperture = Aperture + (Node->Alignment + 1) - offset;
+      Aperture = Aperture + (Node->Alignment + 1) - Offset;
 
     }
 
@@ -256,18 +256,18 @@ CalculateApertureIo16 (
             &Aperture,
             Node->Length               
             );
-          offset = Aperture & (Node->Alignment);
-          if (offset != 0) {
-            Aperture = Aperture + (Node->Alignment + 1) - offset;
+          Offset = Aperture & (Node->Alignment);
+          if (Offset != 0) {
+            Aperture = Aperture + (Node->Alignment + 1) - Offset;
           }
         } else if (VGAEnable) {
           SkipVGAAperture (
             &Aperture,
             Node->Length
             );
-          offset = Aperture & (Node->Alignment);
-          if (offset != 0) {
-            Aperture = Aperture + (Node->Alignment + 1) - offset;
+          Offset = Aperture & (Node->Alignment);
+          if (Offset != 0) {
+            Aperture = Aperture + (Node->Alignment + 1) - Offset;
           }
         }
       }
@@ -287,10 +287,10 @@ CalculateApertureIo16 (
   // At last, adjust the aperture with the bridge's
   // alignment
   //
-  offset = Aperture & (Bridge->Alignment);
+  Offset = Aperture & (Bridge->Alignment);
 
-  if (offset != 0) {
-    Aperture = Aperture + (Bridge->Alignment + 1) - offset;
+  if (Offset != 0) {
+    Aperture = Aperture + (Bridge->Alignment + 1) - Offset;
   }
 
   Bridge->Length = Aperture;
@@ -326,7 +326,7 @@ CalculateResourceAperture (
   LIST_ENTRY        *CurrentLink;
   PCI_RESOURCE_NODE *Node;
 
-  UINT64            offset;
+  UINT64            Offset;
 
   Aperture = 0;
 
@@ -351,11 +351,11 @@ CalculateResourceAperture (
     // Apply padding resource if available
     //
         
-    offset = Aperture & (Node->Alignment);
+    Offset = Aperture & (Node->Alignment);
 
-    if (offset != 0) {
+    if (Offset != 0) {
 
-      Aperture = Aperture + (Node->Alignment + 1) - offset;
+      Aperture = Aperture + (Node->Alignment + 1) - Offset;
 
     }
 
@@ -381,9 +381,9 @@ CalculateResourceAperture (
   // At last, adjust the aperture with the bridge's
   // alignment
   //
-  offset = Aperture & (Bridge->Alignment);
-  if (offset != 0) {
-    Aperture = Aperture + (Bridge->Alignment + 1) - offset;
+  Offset = Aperture & (Bridge->Alignment);
+  if (Offset != 0) {
+    Aperture = Aperture + (Bridge->Alignment + 1) - Offset;
   }
 
   //
@@ -2017,7 +2017,7 @@ ApplyResourcePadding (
         // prefechable
         //
         if (Ptr->SpecificFlag == 0x6) {
-          if (Ptr->AddrLen) {
+          if (Ptr->AddrLen != 0) {
             Node = CreateResourceNode (
                     PciDev,
                     Ptr->AddrLen,
@@ -2040,7 +2040,7 @@ ApplyResourcePadding (
         // Non-prefechable
         //
         if (Ptr->SpecificFlag == 0) {
-          if (Ptr->AddrLen) {
+          if (Ptr->AddrLen != 0) {
             Node = CreateResourceNode (
                     PciDev,
                     Ptr->AddrLen,
@@ -2066,7 +2066,7 @@ ApplyResourcePadding (
         // prefechable
         //
         if (Ptr->SpecificFlag == 0x6) {
-          if (Ptr->AddrLen) {
+          if (Ptr->AddrLen != 0) {
             Node = CreateResourceNode (
                     PciDev,
                     Ptr->AddrLen,
@@ -2089,7 +2089,7 @@ ApplyResourcePadding (
         // Non-prefechable
         //
         if (Ptr->SpecificFlag == 0) {
-          if (Ptr->AddrLen) {
+          if (Ptr->AddrLen != 0) {
             Node = CreateResourceNode (
                     PciDev,
                     Ptr->AddrLen,