diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S index fbaa0725f0..ec5b9a0b04 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S @@ -123,7 +123,7 @@ L11: L12: # as cr4.PGE is not set here, refresh cr3 movl %eax, %cr4 # in PreModifyMtrrs() to flush TLB. movl %cr0, %ebx - orl $0x080000000, %ebx # enable paging + orl $0x080010000, %ebx # enable paging + WP movl %ebx, %cr0 leal DSC_OFFSET(%edi),%ebx movw DSC_DS(%ebx),%ax diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm index 8a12927300..ac1a9b48dd 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm @@ -129,7 +129,7 @@ gSmiCr3 DD ? @@: ; as cr4.PGE is not set here, refresh cr3 mov cr4, eax ; in PreModifyMtrrs() to flush TLB. mov ebx, cr0 - or ebx, 080000000h ; enable paging + or ebx, 080010000h ; enable paging + WP mov cr0, ebx lea ebx, [edi + DSC_OFFSET] mov ax, [ebx + DSC_DS] diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S index b488b74b70..7e9ac58cb2 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S @@ -144,7 +144,7 @@ Base: orb $1,%ah wrmsr movq %cr0, %rbx - btsl $31, %ebx + orl $0x080010000, %ebx # enable paging + WP movq %rbx, %cr0 retf LongMode: # long mode (64-bit code) starts here diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm index 4f5c03c5cf..094cf2c3da 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm @@ -140,7 +140,7 @@ Base: or ah, 1 wrmsr mov rbx, cr0 - bts ebx, 31 + or ebx, 080010000h ; enable paging + WP mov cr0, rbx retf @LongMode: ; long mode (64-bit code) starts here