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Save/Restore missing volatile registers (XMM0-5) save/restore in Page Fault handler. 

Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13974 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
vanjeff 2012-11-28 04:49:48 +00:00
parent 72ccedbd76
commit 53c76a6478
2 changed files with 42 additions and 6 deletions
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24
EdkCompatibilityPkg/Compatibility/SmmBaseHelper/X64/PageFaultHandler.S
View File

@ -1,6 +1,6 @@
#------------------------------------------------------------------------------ #------------------------------------------------------------------------------
# #
# Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> # Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials # This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License # are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at # which accompanies this distribution. The full text of the license may be found at
@ -28,10 +28,28 @@ ASM_PFX(PageFaultHandlerHook):
pushq %r9 pushq %r9
pushq %r10 pushq %r10
pushq %r11 pushq %r11
addq $-0x68, %rsp # reserve memory to store XMM registers and make address 16-byte alignment
movdqa %xmm0, 0(%rsp)
movdqa %xmm1, 0x10(%rsp)
movdqa %xmm2, 0x20(%rsp)
movdqa %xmm3, 0x30(%rsp)
movdqa %xmm4, 0x40(%rsp)
movdqa %xmm5, 0x50(%rsp)
addq $-0x20, %rsp addq $-0x20, %rsp
call ASM_PFX(PageFaultHandler) call ASM_PFX(PageFaultHandler)
addq $0x20, %rsp addq $0x20, %rsp
testb %al, %al
movdqa 0(%rsp), %xmm0
movdqa 0x10(%rsp), %xmm1
movdqa 0x20(%rsp), %xmm2
movdqa 0x30(%rsp), %xmm3
movdqa 0x40(%rsp), %xmm4
movdqa 0x50(%rsp), %xmm5
addq $0x68, %rsp
testb %al, %al # set ZF flag
popq %r11 popq %r11
popq %r10 popq %r10
popq %r9 popq %r9
@ -39,7 +57,7 @@ ASM_PFX(PageFaultHandlerHook):
popq %rdx popq %rdx
popq %rcx popq %rcx
popq %rax # restore all volatile registers popq %rax # restore all volatile registers
jnz L1 jnz L1 # check ZF flag
#ifdef __APPLE__ #ifdef __APPLE__
int $3 int $3
#else #else

24
EdkCompatibilityPkg/Compatibility/SmmBaseHelper/X64/PageFaultHandler.asm
View File

@ -1,6 +1,6 @@
;------------------------------------------------------------------------------ ;------------------------------------------------------------------------------
; ;
; Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR> ; Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials ; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -32,10 +32,28 @@ PageFaultHandlerHook PROC
push r9 push r9
push r10 push r10
push r11 push r11
add rsp, -10h * 6 - 8 ; reserve memory to store XMM registers and make address 16-byte alignment
movdqa [rsp], xmm0
movdqa [rsp + 10h], xmm1
movdqa [rsp + 20h], xmm2
movdqa [rsp + 30h], xmm3
movdqa [rsp + 40h], xmm4
movdqa [rsp + 50h], xmm5
add rsp, -20h add rsp, -20h
call PageFaultHandler call PageFaultHandler
add rsp, 20h add rsp, 20h
test al, al
movdqa xmm0, [rsp]
movdqa xmm1, [rsp + 10h]
movdqa xmm2, [rsp + 20h]
movdqa xmm3, [rsp + 30h]
movdqa xmm4, [rsp + 40h]
movdqa xmm5, [rsp + 50h]
add rsp, 10h * 6 + 8
test al, al ; set ZF flag
pop r11 pop r11
pop r10 pop r10
pop r9 pop r9
@ -43,7 +61,7 @@ PageFaultHandlerHook PROC
pop rdx pop rdx
pop rcx pop rcx
pop rax ; restore all volatile registers pop rax ; restore all volatile registers
jnz @F jnz @F ; check ZF flag
jmp mOriginalHandler jmp mOriginalHandler
@@: @@:
add rsp, 08h ; skip error code for PF add rsp, 08h ; skip error code for PF