mirror of https://github.com/acidanthera/audk.git
Fix CodeSourcery 2010q1 link issue by adding missing intrinsics
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10692 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
andrewfish
parent
d4b6dd9300
commit
54a7013153
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@ -0,0 +1,59 @@
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//------------------------------------------------------------------------------
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//
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// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//------------------------------------------------------------------------------
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.text
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.align 2
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.globl ASM_PFX(__aeabi_ldivmod)
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//
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// A pair of (unsigned) long longs is returned in {{r0, r1}, {r2, r3}},
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// the quotient in {r0, r1}, and the remainder in {r2, r3}.
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//
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//__value_in_regs lldiv_t
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//EFIAPI
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//__aeabi_ldivmod (
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// IN UINT64 Dividen
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// IN UINT64 Divisor
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// )//
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//
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ASM_PFX(__aeabi_ldivmod):
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PUSH {r4,lr}
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ASRS r4,r1,#1
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EOR r4,r4,r3,LSR #1
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BPL L_Test1
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RSBS r0,r0,#0
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RSC r1,r1,#0
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L_Test1:
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TST r3,r3
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BPL L_Test2
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RSBS r2,r2,#0
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RSC r3,r3,#0
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L_Test2:
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BL ASM_PFX(__aeabi_uldivmod)
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TST r4,#0x40000000
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BEQ L_Test3
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RSBS r0,r0,#0
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RSC r1,r1,#0
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L_Test3:
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TST r4,#0x80000000
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BEQ L_Exit
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RSBS r2,r2,#0
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RSC r3,r3,#0
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L_Exit:
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POP {r4,pc}
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@ -31,22 +31,26 @@ __aeabi_ldivmod
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PUSH {r4,lr}
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ASRS r4,r1,#1
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EOR r4,r4,r3,LSR #1
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BPL {pc} + 0xc ; 0x18
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BPL L_Test1
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RSBS r0,r0,#0
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RSC r1,r1,#0
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L_Test1
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TST r3,r3
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BPL {pc} + 0xc ; 0x28
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BPL L_Test2
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RSBS r2,r2,#0
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RSC r3,r3,#0
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L_Test2
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BL __aeabi_uldivmod ;
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TST r4,#0x40000000
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BEQ {pc} + 0xc ; 0x3c
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BEQ L_Test3
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RSBS r0,r0,#0
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RSC r1,r1,#0
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L_Test3
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TST r4,#0x80000000
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BEQ {pc} + 0xc ; 0x4c
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BEQ L_Exit
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RSBS r2,r2,#0
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RSC r3,r3,#0
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L_Exit
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POP {r4,pc}
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END
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@ -0,0 +1,267 @@
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//------------------------------------------------------------------------------
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//
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// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//------------------------------------------------------------------------------
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.text
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.align 2
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.globl ASM_PFX(__aeabi_uldivmod)
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//
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//UINT64
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//EFIAPI
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//__aeabi_uldivmod (
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// IN UINT64 Dividend
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// IN UINT64 Divisor
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// )
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//
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ASM_PFX(__aeabi_uldivmod):
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stmdb sp!, {r4, r5, r6, lr}
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mov r4, r1
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mov r5, r0
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mov r6, #0 // 0x0
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orrs ip, r3, r2, lsr #31
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bne ASM_PFX(__aeabi_uldivmod_label1)
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tst r2, r2
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beq ASM_PFX(_ll_div0)
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movs ip, r2, lsr #15
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addeq r6, r6, #16 // 0x10
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mov ip, r2, lsl r6
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movs lr, ip, lsr #23
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moveq ip, ip, lsl #8
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addeq r6, r6, #8 // 0x8
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movs lr, ip, lsr #27
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moveq ip, ip, lsl #4
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addeq r6, r6, #4 // 0x4
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movs lr, ip, lsr #29
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moveq ip, ip, lsl #2
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addeq r6, r6, #2 // 0x2
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movs lr, ip, lsr #30
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moveq ip, ip, lsl #1
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addeq r6, r6, #1 // 0x1
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b ASM_PFX(_ll_udiv_small)
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ASM_PFX(__aeabi_uldivmod_label1):
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tst r3, #-2147483648 // 0x80000000
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bne ASM_PFX(__aeabi_uldivmod_label2)
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movs ip, r3, lsr #15
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addeq r6, r6, #16 // 0x10
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mov ip, r3, lsl r6
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movs lr, ip, lsr #23
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moveq ip, ip, lsl #8
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addeq r6, r6, #8 // 0x8
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movs lr, ip, lsr #27
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moveq ip, ip, lsl #4
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addeq r6, r6, #4 // 0x4
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movs lr, ip, lsr #29
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moveq ip, ip, lsl #2
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addeq r6, r6, #2 // 0x2
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movs lr, ip, lsr #30
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addeq r6, r6, #1 // 0x1
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rsb r3, r6, #32 // 0x20
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moveq ip, ip, lsl #1
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orr ip, ip, r2, lsr r3
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mov lr, r2, lsl r6
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b ASM_PFX(_ll_udiv_big)
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ASM_PFX(__aeabi_uldivmod_label2):
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mov ip, r3
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mov lr, r2
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b ASM_PFX(_ll_udiv_ginormous)
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ASM_PFX(_ll_udiv_small):
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cmp r4, ip, lsl #1
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mov r3, #0 // 0x0
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subcs r4, r4, ip, lsl #1
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addcs r3, r3, #2 // 0x2
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cmp r4, ip
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subcs r4, r4, ip
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adcs r3, r3, #0 // 0x0
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add r2, r6, #32 // 0x20
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cmp r2, #32 // 0x20
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rsb ip, ip, #0 // 0x0
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bcc ASM_PFX(_ll_udiv_small_label1)
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orrs r0, r4, r5, lsr #30
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moveq r4, r5
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moveq r5, #0 // 0x0
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subeq r2, r2, #32 // 0x20
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ASM_PFX(_ll_udiv_small_label1):
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mov r1, #0 // 0x0
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cmp r2, #16 // 0x10
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bcc ASM_PFX(_ll_udiv_small_label2)
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movs r0, r4, lsr #14
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moveq r4, r4, lsl #16
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addeq r1, r1, #16 // 0x10
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ASM_PFX(_ll_udiv_small_label2):
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sub lr, r2, r1
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cmp lr, #8 // 0x8
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bcc ASM_PFX(_ll_udiv_small_label3)
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movs r0, r4, lsr #22
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moveq r4, r4, lsl #8
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addeq r1, r1, #8 // 0x8
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ASM_PFX(_ll_udiv_small_label3):
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rsb r0, r1, #32 // 0x20
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sub r2, r2, r1
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orr r4, r4, r5, lsr r0
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mov r5, r5, lsl r1
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cmp r2, #1 // 0x1
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bcc ASM_PFX(_ll_udiv_small_label5)
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sub r2, r2, #1 // 0x1
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and r0, r2, #7 // 0x7
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eor r0, r0, #7 // 0x7
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adds r0, r0, r0, lsl #1
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add pc, pc, r0, lsl #2
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nop // (mov r0,r0)
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ASM_PFX(_ll_udiv_small_label4):
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adcs r5, r5, r5
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adcs r4, ip, r4, lsl #1
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rsbcc r4, ip, r4
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adcs r5, r5, r5
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adcs r4, ip, r4, lsl #1
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rsbcc r4, ip, r4
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adcs r5, r5, r5
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adcs r4, ip, r4, lsl #1
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rsbcc r4, ip, r4
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adcs r5, r5, r5
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adcs r4, ip, r4, lsl #1
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rsbcc r4, ip, r4
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adcs r5, r5, r5
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adcs r4, ip, r4, lsl #1
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rsbcc r4, ip, r4
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adcs r5, r5, r5
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adcs r4, ip, r4, lsl #1
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rsbcc r4, ip, r4
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adcs r5, r5, r5
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adcs r4, ip, r4, lsl #1
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rsbcc r4, ip, r4
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adcs r5, r5, r5
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adcs r4, ip, r4, lsl #1
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sub r2, r2, #8 // 0x8
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tst r2, r2
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rsbcc r4, ip, r4
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bpl ASM_PFX(_ll_udiv_small_label4)
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ASM_PFX(_ll_udiv_small_label5):
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mov r2, r4, lsr r6
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bic r4, r4, r2, lsl r6
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adcs r0, r5, r5
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adc r1, r4, r4
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add r1, r1, r3, lsl r6
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mov r3, #0 // 0x0
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ldmia sp!, {r4, r5, r6, pc}
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ASM_PFX(_ll_udiv_big):
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subs r0, r5, lr
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mov r3, #0 // 0x0
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sbcs r1, r4, ip
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movcs r5, r0
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movcs r4, r1
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adcs r3, r3, #0 // 0x0
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subs r0, r5, lr
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sbcs r1, r4, ip
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movcs r5, r0
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movcs r4, r1
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adcs r3, r3, #0 // 0x0
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subs r0, r5, lr
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sbcs r1, r4, ip
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movcs r5, r0
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movcs r4, r1
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adcs r3, r3, #0 // 0x0
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mov r1, #0 // 0x0
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rsbs lr, lr, #0 // 0x0
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rsc ip, ip, #0 // 0x0
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cmp r6, #16 // 0x10
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bcc ASM_PFX(_ll_udiv_big_label1)
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movs r0, r4, lsr #14
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moveq r4, r4, lsl #16
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addeq r1, r1, #16 // 0x10
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ASM_PFX(_ll_udiv_big_label1):
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sub r2, r6, r1
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cmp r2, #8 // 0x8
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bcc ASM_PFX(_ll_udiv_big_label2)
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movs r0, r4, lsr #22
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moveq r4, r4, lsl #8
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addeq r1, r1, #8 // 0x8
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ASM_PFX(_ll_udiv_big_label2):
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rsb r0, r1, #32 // 0x20
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sub r2, r6, r1
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orr r4, r4, r5, lsr r0
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mov r5, r5, lsl r1
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cmp r2, #1 // 0x1
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bcc ASM_PFX(_ll_udiv_big_label4)
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sub r2, r2, #1 // 0x1
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and r0, r2, #3 // 0x3
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rsb r0, r0, #3 // 0x3
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adds r0, r0, r0, lsl #1
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add pc, pc, r0, lsl #3
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nop // (mov r0,r0)
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ASM_PFX(_ll_udiv_big_label3):
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adcs r5, r5, r5
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adcs r4, r4, r4
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adcs r0, lr, r5
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adcs r1, ip, r4
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movcs r5, r0
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movcs r4, r1
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adcs r5, r5, r5
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adcs r4, r4, r4
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adcs r0, lr, r5
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adcs r1, ip, r4
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movcs r5, r0
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movcs r4, r1
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adcs r5, r5, r5
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adcs r4, r4, r4
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adcs r0, lr, r5
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adcs r1, ip, r4
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movcs r5, r0
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movcs r4, r1
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sub r2, r2, #4 // 0x4
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adcs r5, r5, r5
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adcs r4, r4, r4
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adcs r0, lr, r5
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adcs r1, ip, r4
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tst r2, r2
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movcs r5, r0
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movcs r4, r1
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bpl ASM_PFX(_ll_udiv_big_label3)
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ASM_PFX(_ll_udiv_big_label4):
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mov r1, #0 // 0x0
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mov r2, r5, lsr r6
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bic r5, r5, r2, lsl r6
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adcs r0, r5, r5
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adc r1, r1, #0 // 0x0
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movs lr, r3, lsl r6
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mov r3, r4, lsr r6
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bic r4, r4, r3, lsl r6
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adc r1, r1, #0 // 0x0
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adds r0, r0, lr
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orr r2, r2, r4, ror r6
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adc r1, r1, #0 // 0x0
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ldmia sp!, {r4, r5, r6, pc}
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ASM_PFX(_ll_udiv_ginormous):
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subs r2, r5, lr
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mov r1, #0 // 0x0
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sbcs r3, r4, ip
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adc r0, r1, r1
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movcc r2, r5
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movcc r3, r4
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ldmia sp!, {r4, r5, r6, pc}
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ASM_PFX(_ll_div0):
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ldmia sp!, {r4, r5, r6, lr}
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mov r0, #0 // 0x0
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mov r1, #0 // 0x0
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b ASM_PFX(__aeabi_ldiv0)
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ASM_PFX(__aeabi_ldiv0):
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BX r14
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@ -89,6 +89,8 @@
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Arm/sourcery.S | GCC
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Arm/uldivmod.c | GCC
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Arm/uldiv.S | GCC
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Arm/ldivmod.S | GCC
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[Packages]
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MdePkg/MdePkg.dec
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