mirror of https://github.com/acidanthera/audk.git
Vlv2TbltDevicePkg/PpmPolicy: Remove the usage of global variables
gcc issued the error of "multiple deifintion" since gBS was also defined in MdePkg/Library/UefiBootServicesTableLib. Actually those global variables, gBS, pBS, and pRS, in PpmPolicy.h were only used in one function. Besides, gBS and pRS were not really used. Remove gBS and pRS and declare pBS in PpmPolicyEntry() to satisfy gcc. Cc: David Wei <david.wei@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gary Lin <glin@suse.com> Reviewed-by: David Wei <david.wei@intel.com>
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@ -33,8 +33,6 @@ Abstract:
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#define EFI_CPUID_MODEL 0x00F0
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#define EFI_CPUID_STEPPING 0x000F
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EFI_STATUS
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EFIAPI
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PpmPolicyEntry(
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@ -42,6 +40,7 @@ PpmPolicyEntry(
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_BOOT_SERVICES *pBS;
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EFI_MP_SERVICES_PROTOCOL *MpService;
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EFI_CPUID_REGISTER Cpuid01 = { 0, 0, 0, 0};
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EFI_HANDLE Handle;
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@ -52,15 +51,12 @@ PpmPolicyEntry(
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PCH_STEPPING Stepping;
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gBS = SystemTable->BootServices;
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pBS = SystemTable->BootServices;
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pRS = SystemTable->RuntimeServices;
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//
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// Set PPM policy structure to known value
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//
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gBS->SetMem (&mDxePlatformPpmPolicy, sizeof(PPM_PLATFORM_POLICY_PROTOCOL), 0);
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pBS->SetMem (&mDxePlatformPpmPolicy, sizeof(PPM_PLATFORM_POLICY_PROTOCOL), 0);
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//
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// Find the MpService Protocol
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@ -147,7 +143,7 @@ PpmPolicyEntry(
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mDxePlatformPpmPolicy.S3RestoreMsrSwSmiNumber = S3_RESTORE_MSR_SW_SMI;
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Handle = NULL;
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Status = gBS->InstallMultipleProtocolInterfaces (
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Status = pBS->InstallMultipleProtocolInterfaces (
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&Handle,
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&gPpmPlatformPolicyProtocolGuid,
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&mDxePlatformPpmPolicy,
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@ -31,10 +31,6 @@ PPM_PLATFORM_POLICY_PROTOCOL mDxePlatformPpmPolicy;
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#define ICH_DEVICE_ENABLE 1
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#define ICH_DEVICE_DISABLE 0
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EFI_BOOT_SERVICES *gBS;
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EFI_BOOT_SERVICES *pBS;
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EFI_RUNTIME_SERVICES *pRS;
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#define POWER_STATE_SWITCH_SMI 43
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#define ENABLE_C_STATE_IO_REDIRECTION_SMI 70
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#define DISABLE_C_STATE_IO_REDIRECTION_SMI 71
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@ -43,4 +39,4 @@ EFI_RUNTIME_SERVICES *pRS;
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#define ENABLE_P_STATE_HARDWARE_COORDINATION_SMI 74
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#define DISABLE_P_STATE_HARDWARE_COORDINATION_SMI 75
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#define S3_RESTORE_MSR_SW_SMI 48
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#define ENABLE_C6_RESIDENCY_SMI 76
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#define ENABLE_C6_RESIDENCY_SMI 76
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