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MdePkg: fix ARM version of InternalMathSwapBytes64 () 

The ARM asm implementation of InternalMathSwapBytes64 () does
interesting things if bit 7 of operand r1 (upper 32 bits of the
input value) is set. After the recursive swap, bit 7 ends up in
the sign bit position, after which it is right shifted with sign
extension, and or'ed with the upper half of the output value.

This means SwapBytes64 (0x00000080_00000000) returns an incorrect
value of 0xFFFFFFFF_80000000.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17077 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ard Biesheuvel 2015-03-27 17:27:14 +00:00 committed by lersek
parent e2ab3f819f
commit 55f5af1871
1 changed files with 4 additions and 12 deletions
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16
MdePkg/Library/BaseLib/Arm/Math64.S
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@ -256,22 +256,14 @@ L30:
GCC_ASM_EXPORT(InternalMathSwapBytes64)
ASM_PFX(InternalMathSwapBytes64):
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
stmfd sp!, {r4, r5, r6, r7, lr}
add r7, sp, #12
stmfd sp!, {r4, r5, r7, lr}
mov r5, r1
bl ASM_PFX(SwapBytes32)
mov r6, r0
mov r4, r0
mov r0, r5
bl ASM_PFX(SwapBytes32)
mov r4, r6
mov r5, r4, asr #31
mov r2, #0
mov r1, r0, asr #31
orr r0, r0, r2
orr r1, r1, r4
ldmfd sp!, {r4, r5, r6, r7, pc}
mov r1, r4
ldmfd sp!, {r4, r5, r7, pc}
ASM_FUNCTION_REMOVE_IF_UNREFERENCED