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Check in definition for various ACPI tables and the header files for ACPI spec ranged from 1.0 to 3.0. 

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3287 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
qwang12 2007-07-17 05:36:16 +00:00
parent f875148084
commit 568eb0cb4b
9 changed files with 1993 additions and 0 deletions
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288
MdePkg/Include/IndustryStandard/Acpi1_0.h Normal file
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/**
@file
ACPI 1.0b definitions from the ACPI Specification, revision 1.0b
Copyright (c) 2006 - 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _ACPI_1_0_H_
#define _ACPI_1_0_H_
#include "Acpi.h"
//
// Ensure proper structure formats
//
#pragma pack(1)
//
// ACPI 1.0b table structures
//
//
// Root System Description Pointer Structure
//
typedef struct {
UINT64 Signature;
UINT8 Checksum;
UINT8 OemId[6];
UINT8 Reserved;
UINT32 RsdtAddress;
} EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
//
// Root System Description Table
// No definition needed as it is a common description table header followed by a
// variable number of UINT32 table pointers.
//
//
// RSDT Revision (as defined in ACPI 1.0b spec.)
//
#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Fixed ACPI Description Table Structure (FADT)
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 FirmwareCtrl;
UINT32 Dsdt;
UINT8 IntModel;
UINT8 Reserved1;
UINT16 SciInt;
UINT32 SmiCmd;
UINT8 AcpiEnable;
UINT8 AcpiDisable;
UINT8 S4BiosReq;
UINT8 Reserved2;
UINT32 Pm1aEvtBlk;
UINT32 Pm1bEvtBlk;
UINT32 Pm1aCntBlk;
UINT32 Pm1bCntBlk;
UINT32 Pm2CntBlk;
UINT32 PmTmrBlk;
UINT32 Gpe0Blk;
UINT32 Gpe1Blk;
UINT8 Pm1EvtLen;
UINT8 Pm1CntLen;
UINT8 Pm2CntLen;
UINT8 PmTmLen;
UINT8 Gpe0BlkLen;
UINT8 Gpe1BlkLen;
UINT8 Gpe1Base;
UINT8 Reserved3;
UINT16 PLvl2Lat;
UINT16 PLvl3Lat;
UINT16 FlushSize;
UINT16 FlushStride;
UINT8 DutyOffset;
UINT8 DutyWidth;
UINT8 DayAlrm;
UINT8 MonAlrm;
UINT8 Century;
UINT8 Reserved4;
UINT8 Reserved5;
UINT8 Reserved6;
UINT32 Flags;
} EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE;
//
// FADT Version (as defined in ACPI 1.0b spec.)
//
#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x01
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_1_0_WBINVD (1 << 0)
#define EFI_ACPI_1_0_WBINVD_FLUSH (1 << 1)
#define EFI_ACPI_1_0_PROC_C1 (1 << 2)
#define EFI_ACPI_1_0_P_LVL2_UP (1 << 3)
#define EFI_ACPI_1_0_PWR_BUTTON (1 << 4)
#define EFI_ACPI_1_0_SLP_BUTTON (1 << 5)
#define EFI_ACPI_1_0_FIX_RTC (1 << 6)
#define EFI_ACPI_1_0_RTC_S4 (1 << 7)
#define EFI_ACPI_1_0_TMR_VAL_EXT (1 << 8)
#define EFI_ACPI_1_0_DCK_CAP (1 << 9)
//
// Firmware ACPI Control Structure
//
typedef struct {
UINT32 Signature;
UINT32 Length;
UINT32 HardwareSignature;
UINT32 FirmwareWakingVector;
UINT32 GlobalLock;
UINT32 Flags;
UINT8 Reserved[40];
} EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
//
// Firmware Control Structure Feature Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_1_0_S4BIOS_F (1 << 0)
//
// Multiple APIC Description Table header definition. The rest of the table
// must be defined in a platform specific manner.
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 LocalApicAddress;
UINT32 Flags;
} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
//
// MADT Revision (as defined in ACPI 1.0b spec.)
//
#define EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
//
// Multiple APIC Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_1_0_PCAT_COMPAT (1 << 0)
//
// Multiple APIC Description Table APIC structure types
// All other values between 0x09 an 0xFF are reserved and
// will be ignored by OSPM.
//
#define EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC 0x00
#define EFI_ACPI_1_0_IO_APIC 0x01
#define EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE 0x02
#define EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
#define EFI_ACPI_1_0_LOCAL_APIC_NMI 0x04
//
// APIC Structure Definitions
//
//
// Processor Local APIC Structure Definition
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 AcpiProcessorId;
UINT8 ApicId;
UINT32 Flags;
} EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
//
// Local APIC Flags. All other bits are reserved and must be 0.
//
#define EFI_ACPI_1_0_LOCAL_APIC_ENABLED (1 << 0)
//
// IO APIC Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 IoApicId;
UINT8 Reserved;
UINT32 IoApicAddress;
UINT32 SystemVectorBase;
} EFI_ACPI_1_0_IO_APIC_STRUCTURE;
//
// Interrupt Source Override Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 Bus;
UINT8 Source;
UINT32 GlobalSystemInterruptVector;
UINT16 Flags;
} EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
//
// Non-Maskable Interrupt Source Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT16 Flags;
UINT32 GlobalSystemInterruptVector;
} EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
//
// Local APIC NMI Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 AcpiProcessorId;
UINT16 Flags;
UINT8 LocalApicInti;
} EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE;
//
// Smart Battery Description Table (SBST)
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 WarningEnergyLevel;
UINT32 LowEnergyLevel;
UINT32 CriticalEnergyLevel;
} EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE;
//
// Known table signatures
//
//
// "RSD PTR " Root System Description Pointer
//
#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352ULL
//
// "APIC" Multiple APIC Description Table
//
#define EFI_ACPI_1_0_APIC_SIGNATURE 0x43495041
//
// "DSDT" Differentiated System Description Table
//
#define EFI_ACPI_1_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344
//
// "FACS" Firmware ACPI Control Structure
//
#define EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146
//
// "FACP" Fixed ACPI Description Table
//
#define EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
//
// "PSDT" Persistent System Description Table
//
#define EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350
//
// "RSDT" Root System Description Table
//
#define EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352
//
// "SBST" Smart Battery Specification Table
//
#define EFI_ACPI_1_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253
//
// "SSDT" Secondary System Description Table
//
#define EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353
#pragma pack()
#endif

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MdePkg/Include/IndustryStandard/Acpi2_0.h Normal file
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/**
@file
ACPI 2.0 definitions from the ACPI Specification, revision 2.0
Copyright (c) 2006 - 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _ACPI_2_0_H_
#define _ACPI_2_0_H_
#include "Acpi.h"
//
// Ensure proper structure formats
//
#pragma pack(1)
//
// ACPI Specification Revision
//
#define EFI_ACPI_2_0_REVISION 0x02
//
// BUGBUG: OEM values need to be moved somewhere else, probably read from data hub
// and produced by a platform specific driver.
//
//
// ACPI OEM ID
//
#define EFI_ACPI_2_0_OEM_ID "INTEL "
#define EFI_ACPI_2_0_OEM_TABLE_ID 0x5034303738543245 // "E2T8704P"
//
// ACPI OEM Revision
//
#define EFI_ACPI_2_0_OEM_REVISION 0x00000002
//
// ACPI table creator ID
//
#define EFI_ACPI_2_0_CREATOR_ID 0x5446534D // TBD "MSFT"
//
// ACPI table creator revision
//
#define EFI_ACPI_2_0_CREATOR_REVISION 0x01000013 // TBD
//
// ACPI 2.0 Generic Address Space definition
//
typedef struct {
UINT8 AddressSpaceId;
UINT8 RegisterBitWidth;
UINT8 RegisterBitOffset;
UINT8 Reserved;
UINT64 Address;
} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;
//
// Generic Address Space Address IDs
//
#define EFI_ACPI_2_0_SYSTEM_MEMORY 0
#define EFI_ACPI_2_0_SYSTEM_IO 1
#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3
#define EFI_ACPI_2_0_SMBUS 4
#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
//
// ACPI 2.0 table structures
//
//
// Root System Description Pointer Structure
//
typedef struct {
UINT64 Signature;
UINT8 Checksum;
UINT8 OemId[6];
UINT8 Revision;
UINT32 RsdtAddress;
UINT32 Length;
UINT64 XsdtAddress;
UINT8 ExtendedChecksum;
UINT8 Reserved[3];
} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
//
// RSD_PTR Revision (as defined in ACPI 2.0 spec.)
//
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02
//
// Common table header, this prefaces all ACPI tables, including FACS, but
// excluding the RSD PTR structure
//
typedef struct {
UINT32 Signature;
UINT32 Length;
} EFI_ACPI_2_0_COMMON_HEADER;
//
// Root System Description Table
// No definition needed as it is a common description table header followed by a
// variable number of UINT32 table pointers.
//
//
// RSDT Revision (as defined in ACPI 2.0 spec.)
//
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
// No definition needed as it is a common description table header followed by a
// variable number of UINT64 table pointers.
//
//
// XSDT Revision (as defined in ACPI 2.0 spec.)
//
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Fixed ACPI Description Table Structure (FADT)
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 FirmwareCtrl;
UINT32 Dsdt;
UINT8 Reserved0;
UINT8 PreferredPmProfile;
UINT16 SciInt;
UINT32 SmiCmd;
UINT8 AcpiEnable;
UINT8 AcpiDisable;
UINT8 S4BiosReq;
UINT8 PstateCnt;
UINT32 Pm1aEvtBlk;
UINT32 Pm1bEvtBlk;
UINT32 Pm1aCntBlk;
UINT32 Pm1bCntBlk;
UINT32 Pm2CntBlk;
UINT32 PmTmrBlk;
UINT32 Gpe0Blk;
UINT32 Gpe1Blk;
UINT8 Pm1EvtLen;
UINT8 Pm1CntLen;
UINT8 Pm2CntLen;
UINT8 PmTmrLen;
UINT8 Gpe0BlkLen;
UINT8 Gpe1BlkLen;
UINT8 Gpe1Base;
UINT8 CstCnt;
UINT16 PLvl2Lat;
UINT16 PLvl3Lat;
UINT16 FlushSize;
UINT16 FlushStride;
UINT8 DutyOffset;
UINT8 DutyWidth;
UINT8 DayAlrm;
UINT8 MonAlrm;
UINT8 Century;
UINT16 IaPcBootArch;
UINT8 Reserved1;
UINT32 Flags;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
UINT8 ResetValue;
UINT8 Reserved2[3];
UINT64 XFirmwareCtrl;
UINT64 XDsdt;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;
//
// FADT Version (as defined in ACPI 2.0 spec.)
//
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03
//
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)
#define EFI_ACPI_2_0_8042 (1 << 1)
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_2_0_WBINVD (1 << 0)
#define EFI_ACPI_2_0_WBINVD_FLUSH (1 << 1)
#define EFI_ACPI_2_0_PROC_C1 (1 << 2)
#define EFI_ACPI_2_0_P_LVL2_UP (1 << 3)
#define EFI_ACPI_2_0_PWR_BUTTON (1 << 4)
#define EFI_ACPI_2_0_SLP_BUTTON (1 << 5)
#define EFI_ACPI_2_0_FIX_RTC (1 << 6)
#define EFI_ACPI_2_0_RTC_S4 (1 << 7)
#define EFI_ACPI_2_0_TMR_VAL_EXT (1 << 8)
#define EFI_ACPI_2_0_DCK_CAP (1 << 9)
#define EFI_ACPI_2_0_RESET_REG_SUP (1 << 10)
#define EFI_ACPI_2_0_SEALED_CASE (1 << 11)
#define EFI_ACPI_2_0_HEADLESS (1 << 12)
#define EFI_ACPI_2_0_CPU_SW_SLP (1 << 13)
//
// Firmware ACPI Control Structure
//
typedef struct {
UINT32 Signature;
UINT32 Length;
UINT32 HardwareSignature;
UINT32 FirmwareWakingVector;
UINT32 GlobalLock;
UINT32 Flags;
UINT64 XFirmwareWakingVector;
UINT8 Version;
UINT8 Reserved[31];
} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
//
// FACS Version (as defined in ACPI 2.0 spec.)
//
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01
//
// Firmware Control Structure Feature Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_2_0_S4BIOS_F (1 << 0)
//
// Multiple APIC Description Table header definition. The rest of the table
// must be defined in a platform specific manner.
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 LocalApicAddress;
UINT32 Flags;
} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
//
// MADT Revision (as defined in ACPI 2.0 spec.)
//
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01
//
// Multiple APIC Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_2_0_PCAT_COMPAT (1 << 0)
//
// Multiple APIC Description Table APIC structure types
// All other values between 0x09 an 0xFF are reserved and
// will be ignored by OSPM.
//
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00
#define EFI_ACPI_2_0_IO_APIC 0x01
#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02
#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
#define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04
#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
#define EFI_ACPI_2_0_IO_SAPIC 0x06
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07
#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08
//
// APIC Structure Definitions
//
//
// Processor Local APIC Structure Definition
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 AcpiProcessorId;
UINT8 ApicId;
UINT32 Flags;
} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
//
// Local APIC Flags. All other bits are reserved and must be 0.
//
#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)
//
// IO APIC Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 IoApicId;
UINT8 Reserved;
UINT32 IoApicAddress;
UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_2_0_IO_APIC_STRUCTURE;
//
// Interrupt Source Override Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 Bus;
UINT8 Source;
UINT32 GlobalSystemInterrupt;
UINT16 Flags;
} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
//
// Non-Maskable Interrupt Source Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT16 Flags;
UINT32 GlobalSystemInterrupt;
} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
//
// Local APIC NMI Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 AcpiProcessorId;
UINT16 Flags;
UINT8 LocalApicLint;
} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;
//
// Local APIC Address Override Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT16 Reserved;
UINT64 LocalApicAddress;
} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
//
// IO SAPIC Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 IoApicId;
UINT8 Reserved;
UINT32 GlobalSystemInterruptBase;
UINT64 IoSapicAddress;
} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;
//
// Local SAPIC Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 AcpiProcessorId;
UINT8 LocalSapicId;
UINT8 LocalSapicEid;
UINT8 Reserved[3];
UINT32 Flags;
} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
//
// Platform Interrupt Sources Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT16 Flags;
UINT8 InterruptType;
UINT8 ProcessorId;
UINT8 ProcessorEid;
UINT8 IoSapicVector;
UINT32 GlobalSystemInterrupt;
UINT32 Reserved;
} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
//
// Smart Battery Description Table (SBST)
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 WarningEnergyLevel;
UINT32 LowEnergyLevel;
UINT32 CriticalEnergyLevel;
} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;
//
// SBST Version (as defined in ACPI 2.0 spec.)
//
#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
//
// Embedded Controller Boot Resources Table (ECDT)
// The table is followed by a null terminated ASCII string that contains
// a fully qualified reference to the name space object.
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;
UINT32 Uid;
UINT8 GpeBit;
} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
//
// ECDT Version (as defined in ACPI 2.0 spec.)
//
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
//
// Known table signatures
//
//
// "RSD PTR " Root System Description Pointer
//
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352
//
// "SPIC" Multiple SAPIC Description Table
//
// BUGBUG: Don't know where this came from except SR870BN4 uses it.
// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053
//
#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041
//
// "BOOT" MS Simple Boot Spec
//
#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42
//
// "DBGP" MS Bebug Port Spec
//
#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244
//
// "DSDT" Differentiated System Description Table
//
#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344
//
// "ECDT" Embedded Controller Boot Resources Table
//
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345
//
// "ETDT" Event Timer Description Table
//
#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE 0x54445445
//
// "FACS" Firmware ACPI Control Structure
//
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146
//
// "FACP" Fixed ACPI Description Table
//
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
//
// "APIC" Multiple APIC Description Table
//
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041
//
// "PSDT" Persistent System Description Table
//
#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350
//
// "RSDT" Root System Description Table
//
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352
//
// "SBST" Smart Battery Specification Table
//
#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253
//
// "SLIT" System Locality Information Table
//
#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE 0x54494C53
//
// "SPCR" Serial Port Concole Redirection Table
//
#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE 0x52435053
//
// "SRAT" Static Resource Affinity Table
//
#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253
//
// "SSDT" Secondary System Description Table
//
#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353
//
// "SPMI" Server Platform Management Interface Table
//
#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE 0x494D5053
//
// "XSDT" Extended System Description Table
//
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445358
#pragma pack()
#endif

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/**
@file
ACPI 3.0 definitions from the ACPI Specification Revision 3.0 September 2, 2004
Copyright (c) 2006 - 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _ACPI_3_0_H_
#define _ACPI_3_0_H_
#include "Acpi.h"
//
// Ensure proper structure formats
//
#pragma pack(1)
//
// ACPI Specification Revision
//
#define EFI_ACPI_3_0_REVISION 0x03 // BUGBUG: Not in spec yet.
//
// BUGBUG: OEM values need to be moved somewhere else, probably read from data hub
// and produced by a platform specific driver.
//
//
// ACPI 3.0 Generic Address Space definition
//
typedef struct {
UINT8 AddressSpaceId;
UINT8 RegisterBitWidth;
UINT8 RegisterBitOffset;
UINT8 AccessSize;
UINT64 Address;
} EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE;
//
// Generic Address Space Address IDs
//
#define EFI_ACPI_3_0_SYSTEM_MEMORY 0
#define EFI_ACPI_3_0_SYSTEM_IO 1
#define EFI_ACPI_3_0_PCI_CONFIGURATION_SPACE 2
#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER 3
#define EFI_ACPI_3_0_SMBUS 4
#define EFI_ACPI_3_0_FUNCTIONAL_FIXED_HARDWARE 0x7F
//
// Generic Address Space Access Sizes
//
#define EFI_ACPI_3_0_UNDEFINED 0
#define EFI_ACPI_3_0_BYTE 1
#define EFI_ACPI_3_0_WORD 2
#define EFI_ACPI_3_0_DWORD 3
#define EFI_ACPI_3_0_QWORD 4
//
// ACPI 3.0 table structures
//
//
// Root System Description Pointer Structure
//
typedef struct {
UINT64 Signature;
UINT8 Checksum;
UINT8 OemId[6];
UINT8 Revision;
UINT32 RsdtAddress;
UINT32 Length;
UINT64 XsdtAddress;
UINT8 ExtendedChecksum;
UINT8 Reserved[3];
} EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER;
//
// RSD_PTR Revision (as defined in ACPI 3.0 spec.)
//
#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 // ACPISpec30 (Revision 3.0 September 2, 2004) says current value is 2
//
// Common table header, this prefaces all ACPI tables, including FACS, but
// excluding the RSD PTR structure
//
typedef struct {
UINT32 Signature;
UINT32 Length;
} EFI_ACPI_3_0_COMMON_HEADER;
//
// Root System Description Table
// No definition needed as it is a common description table header followed by a
// variable number of UINT32 table pointers.
//
//
// RSDT Revision (as defined in ACPI 3.0 spec.)
//
#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Extended System Description Table
// No definition needed as it is a common description table header followed by a
// variable number of UINT64 table pointers.
//
//
// XSDT Revision (as defined in ACPI 3.0 spec.)
//
#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01
//
// Fixed ACPI Description Table Structure (FADT)
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 FirmwareCtrl;
UINT32 Dsdt;
UINT8 Reserved0;
UINT8 PreferredPmProfile;
UINT16 SciInt;
UINT32 SmiCmd;
UINT8 AcpiEnable;
UINT8 AcpiDisable;
UINT8 S4BiosReq;
UINT8 PstateCnt;
UINT32 Pm1aEvtBlk;
UINT32 Pm1bEvtBlk;
UINT32 Pm1aCntBlk;
UINT32 Pm1bCntBlk;
UINT32 Pm2CntBlk;
UINT32 PmTmrBlk;
UINT32 Gpe0Blk;
UINT32 Gpe1Blk;
UINT8 Pm1EvtLen;
UINT8 Pm1CntLen;
UINT8 Pm2CntLen;
UINT8 PmTmrLen;
UINT8 Gpe0BlkLen;
UINT8 Gpe1BlkLen;
UINT8 Gpe1Base;
UINT8 CstCnt;
UINT16 PLvl2Lat;
UINT16 PLvl3Lat;
UINT16 FlushSize;
UINT16 FlushStride;
UINT8 DutyOffset;
UINT8 DutyWidth;
UINT8 DayAlrm;
UINT8 MonAlrm;
UINT8 Century;
UINT16 IaPcBootArch;
UINT8 Reserved1;
UINT32 Flags;
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE ResetReg;
UINT8 ResetValue;
UINT8 Reserved2[3];
UINT64 XFirmwareCtrl;
UINT64 XDsdt;
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;
} EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE;
//
// FADT Version (as defined in ACPI 3.0 spec.)
//
#define EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x04
//
// Fixed ACPI Description Table Preferred Power Management Profile
//
#define EFI_ACPI_3_0_PM_PROFILE_UNSPECIFIED 0
#define EFI_ACPI_3_0_PM_PROFILE_DESKTOP 1
#define EFI_ACPI_3_0_PM_PROFILE_MOBILE 2
#define EFI_ACPI_3_0_PM_PROFILE_WORKSTATION 3
#define EFI_ACPI_3_0_PM_PROFILE_ENTERPRISE_SERVER 4
#define EFI_ACPI_3_0_PM_PROFILE_SOHO_SERVER 5
#define EFI_ACPI_3_0_PM_PROFILE_APPLIANCE_PC 6
#define EFI_ACPI_3_0_PM_PROFILE_PERFORMANCE_SERVER 7
//
// Fixed ACPI Description Table Boot Architecture Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_3_0_LEGACY_DEVICES (1 << 0)
#define EFI_ACPI_3_0_8042 (1 << 1)
#define EFI_ACPI_3_0_VGA_NOT_PRESENT (1 << 2)
#define EFI_ACPI_3_0_MSI_NOT_SUPPORTED (1 << 3)
//
// Fixed ACPI Description Table Fixed Feature Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_3_0_WBINVD (1 << 0)
#define EFI_ACPI_3_0_WBINVD_FLUSH (1 << 1)
#define EFI_ACPI_3_0_PROC_C1 (1 << 2)
#define EFI_ACPI_3_0_P_LVL2_UP (1 << 3)
#define EFI_ACPI_3_0_PWR_BUTTON (1 << 4)
#define EFI_ACPI_3_0_SLP_BUTTON (1 << 5)
#define EFI_ACPI_3_0_FIX_RTC (1 << 6)
#define EFI_ACPI_3_0_RTC_S4 (1 << 7)
#define EFI_ACPI_3_0_TMR_VAL_EXT (1 << 8)
#define EFI_ACPI_3_0_DCK_CAP (1 << 9)
#define EFI_ACPI_3_0_RESET_REG_SUP (1 << 10)
#define EFI_ACPI_3_0_SEALED_CASE (1 << 11)
#define EFI_ACPI_3_0_HEADLESS (1 << 12)
#define EFI_ACPI_3_0_CPU_SW_SLP (1 << 13)
#define EFI_ACPI_3_0_PCI_EXP_WAK (1 << 14)
#define EFI_ACPI_3_0_USE_PLATFORM_CLOCK (1 << 15)
#define EFI_ACPI_3_0_S4_RTC_STS_VALID (1 << 16)
#define EFI_ACPI_3_0_REMOTE_POWER_ON_CAPABLE (1 << 17)
#define EFI_ACPI_3_0_FORCE_APIC_CLUSTER_MODEL (1 << 18)
#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE (1 << 19)
//
// Firmware ACPI Control Structure
//
typedef struct {
UINT32 Signature;
UINT32 Length;
UINT32 HardwareSignature;
UINT32 FirmwareWakingVector;
UINT32 GlobalLock;
UINT32 Flags;
UINT64 XFirmwareWakingVector;
UINT8 Version;
UINT8 Reserved[31];
} EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;
//
// FACS Version (as defined in ACPI 3.0 spec.)
//
#define EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01
//
// Firmware Control Structure Feature Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_3_0_S4BIOS_F (1 << 0)
//
// Differentiated System Description Table,
// Secondary System Description Table
// and Persistent System Description Table,
// no definition needed as they are common description table header followed by a
// definition block.
//
#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02
//
// Multiple APIC Description Table header definition. The rest of the table
// must be defined in a platform specific manner.
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 LocalApicAddress;
UINT32 Flags;
} EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
//
// MADT Revision (as defined in ACPI 3.0 spec.)
//
#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x02
//
// Multiple APIC Flags
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_3_0_PCAT_COMPAT (1 << 0)
//
// Multiple APIC Description Table APIC structure types
// All other values between 0x09 an 0xFF are reserved and
// will be ignored by OSPM.
//
#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC 0x00
#define EFI_ACPI_3_0_IO_APIC 0x01
#define EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE 0x02
#define EFI_ACPI_3_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03
#define EFI_ACPI_3_0_LOCAL_APIC_NMI 0x04
#define EFI_ACPI_3_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05
#define EFI_ACPI_3_0_IO_SAPIC 0x06
#define EFI_ACPI_3_0_LOCAL_SAPIC 0x07
#define EFI_ACPI_3_0_PLATFORM_INTERRUPT_SOURCES 0x08
//
// APIC Structure Definitions
//
//
// Processor Local APIC Structure Definition
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 AcpiProcessorId;
UINT8 ApicId;
UINT32 Flags;
} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_STRUCTURE;
//
// Local APIC Flags. All other bits are reserved and must be 0.
//
#define EFI_ACPI_3_0_LOCAL_APIC_ENABLED (1 << 0)
//
// IO APIC Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 IoApicId;
UINT8 Reserved;
UINT32 IoApicAddress;
UINT32 GlobalSystemInterruptBase;
} EFI_ACPI_3_0_IO_APIC_STRUCTURE;
//
// Interrupt Source Override Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 Bus;
UINT8 Source;
UINT32 GlobalSystemInterrupt;
UINT16 Flags;
} EFI_ACPI_3_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
//
// Platform Interrupt Sources Structure Definition
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT16 Flags;
UINT8 InterruptType;
UINT8 ProcessorId;
UINT8 ProcessorEid;
UINT8 IoSapicVector;
UINT32 GlobalSystemInterrupt;
UINT32 PlatformInterruptSourceFlags;
UINT8 CpeiProcessorOverride;
UINT8 Reserved[31];
} EFI_ACPI_3_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;
//
// MPS INTI flags.
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_3_0_POLARITY (3 << 0)
#define EFI_ACPI_3_0_TRIGGER_MODE (3 << 2)
//
// Non-Maskable Interrupt Source Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT16 Flags;
UINT32 GlobalSystemInterrupt;
} EFI_ACPI_3_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
//
// Local APIC NMI Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 AcpiProcessorId;
UINT16 Flags;
UINT8 LocalApicLint;
} EFI_ACPI_3_0_LOCAL_APIC_NMI_STRUCTURE;
//
// Local APIC Address Override Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT16 Reserved;
UINT64 LocalApicAddress;
} EFI_ACPI_3_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
//
// IO SAPIC Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 IoApicId;
UINT8 Reserved;
UINT32 GlobalSystemInterruptBase;
UINT64 IoSapicAddress;
} EFI_ACPI_3_0_IO_SAPIC_STRUCTURE;
//
// Local SAPIC Structure
// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 AcpiProcessorId;
UINT8 LocalSapicId;
UINT8 LocalSapicEid;
UINT8 Reserved[3];
UINT32 Flags;
UINT32 ACPIProcessorUIDValue;
} EFI_ACPI_3_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
//
// Platform Interrupt Sources Structure
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT16 Flags;
UINT8 InterruptType;
UINT8 ProcessorId;
UINT8 ProcessorEid;
UINT8 IoSapicVector;
UINT32 GlobalSystemInterrupt;
UINT32 PlatformInterruptSourceFlags;
} EFI_ACPI_3_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
//
// Platform Interrupt Source Flags.
// All other bits are reserved and must be set to 0.
//
#define EFI_ACPI_3_0_CPEI_PROCESSOR_OVERRIDE (1 << 0)
//
// Smart Battery Description Table (SBST)
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 WarningEnergyLevel;
UINT32 LowEnergyLevel;
UINT32 CriticalEnergyLevel;
} EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE;
//
// SBST Version (as defined in ACPI 3.0 spec.)
//
#define EFI_ACPI_3_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01
//
// Embedded Controller Boot Resources Table (ECDT)
// The table is followed by a null terminated ASCII string that contains
// a fully qualified reference to the name space object.
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcControl;
EFI_ACPI_3_0_GENERIC_ADDRESS_STRUCTURE EcData;
UINT32 Uid;
UINT8 GpeBit;
} EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
//
// ECDT Version (as defined in ACPI 3.0 spec.)
//
#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01
//
// System Resource Affinity Table (SRAT. The rest of the table
// must be defined in a platform specific manner.
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 Reserved1; // Must be set to 1
UINT64 Reserved2;
} EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
//
// SRAT Version (as defined in ACPI 3.0 spec.)
//
#define EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x02
//
// SRAT structure types.
// All other values between 0x02 an 0xFF are reserved and
// will be ignored by OSPM.
//
#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00
#define EFI_ACPI_3_0_MEMORY_AFFINITY 0x01
//
// Processor Local APIC/SAPIC Affinity Structure Definition
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT8 ProximityDomain7To0;
UINT8 ApicId;
UINT32 Flags;
UINT8 LocalSapicEid;
UINT8 ProximityDomain31To8[3];
UINT8 Reserved[4];
} EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
//
// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.
//
#define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)
//
// Memory Affinity Structure Definition
//
typedef struct {
UINT8 Type;
UINT8 Length;
UINT32 ProximityDomain;
UINT16 Reserved1;
UINT32 AddressBaseLow;
UINT32 AddressBaseHigh;
UINT32 LengthLow;
UINT32 LengthHigh;
UINT32 Reserved2;
UINT32 Flags;
UINT64 Reserved3;
} EFI_ACPI_3_0_MEMORY_AFFINITY_STRUCTURE;
//
// Memory Flags. All other bits are reserved and must be 0.
//
#define EFI_ACPI_3_0_MEMORY_ENABLED (1 << 0)
#define EFI_ACPI_3_0_MEMORY_HOT_PLUGGABLE (1 << 1)
#define EFI_ACPI_3_0_MEMORY_NONVOLATILE (1 << 2)
//
// System Locality Distance Information Table (SLIT).
// The rest of the table is a matrix.
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT64 NumberOfSystemLocalities;
} EFI_ACPI_3_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
//
// SLIT Version (as defined in ACPI 3.0 spec.)
//
#define EFI_ACPI_3_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01
//
// Known table signatures
//
//
// "RSD PTR " Root System Description Pointer
//
#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352ULL
//
// "APIC" Multiple APIC Description Table
//
#define EFI_ACPI_3_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041
//
// "DSDT" Differentiated System Description Table
//
#define EFI_ACPI_3_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344
//
// "ECDT" Embedded Controller Boot Resources Table
//
#define EFI_ACPI_3_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345
//
// "FACP" Fixed ACPI Description Table
//
#define EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146
//
// "FACS" Firmware ACPI Control Structure
//
#define EFI_ACPI_3_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146
//
// "PSDT" Persistent System Description Table
//
#define EFI_ACPI_3_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350
//
// "RSDT" Root System Description Table
//
#define EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352
//
// "SBST" Smart Battery Specification Table
//
#define EFI_ACPI_3_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253
//
// "SLIT" System Locality Information Table
//
#define EFI_ACPI_3_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE 0x54494C53
//
// "SRAT" System Resource Affinity Table
//
#define EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253
//
// "SSDT" Secondary System Description Table
//
#define EFI_ACPI_3_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353
//
// "XSDT" Extended System Description Table
//
#define EFI_ACPI_3_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445358
//
// "BOOT" MS Simple Boot Spec
//
#define EFI_ACPI_3_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42
//
// "CPEP" Corrected Platform Error Polling Table
// See
//
#define EFI_ACPI_3_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE 0x50455043
//
// "DBGP" MS Debug Port Spec
//
#define EFI_ACPI_3_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244
//
// "ETDT" Event Timer Description Table
//
#define EFI_ACPI_3_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE 0x54445445
//
// "HPET" IA-PC High Precision Event Timer Table
//
#define EFI_ACPI_3_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE 0x54455048
//
// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
//
#define EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE 0x4746434D
//
// "SPCR" Serial Port Concole Redirection Table
//
#define EFI_ACPI_3_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE 0x52435053
//
// "SPMI" Server Platform Management Interface Table
//
#define EFI_ACPI_3_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE 0x494D5053
//
// "TCPA" Trusted Computing Platform Alliance Capabilities Table
//
#define EFI_ACPI_3_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE 0x41504354
//
// "WDRT" Watchdog Resource Table
//
#define EFI_ACPI_3_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE 0x54524457
#pragma pack()
#endif

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/**
@file
ACPI Alert Standard Format Description Table ASF! as described in the ASF2.0 Specification
Copyright (c) 2006 - 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _ALERT_STANDARD_FORMAT_TABLE_H
#define _ALERT_STANDARD_FORMAT_TABLE_H
#include "Acpi2_0.h"
//
// Ensure proper structure formats
//
#pragma pack (1)
//
// Information Record header that appears at the beginning of each record
//
typedef struct {
UINT8 Type;
UINT8 Reserved;
UINT16 RecordLength;
} EFI_ACPI_ASF_RECORD_HEADER;
//
// This structure contains information that identifies the system's type
// and configuration
//
typedef struct {
EFI_ACPI_ASF_RECORD_HEADER RecordHeader;
UINT8 MinWatchDogResetValue;
UINT8 MinPollingInterval;
UINT16 SystemID;
UINT32 IANAManufactureID;
UINT8 FeatureFlags;
UINT8 Reserved[3];
} EFI_ACPI_ASF_INFO;
//
// Alert sensors definition
//
#define ASF_ALRT_SENSOR_ARRAY_LENGTH 36
typedef struct {
EFI_ACPI_ASF_RECORD_HEADER RecordHeader;
UINT8 AssertionEventBitMask;
UINT8 DeassertionEventBitMask;
UINT8 NumberOfAlerts;
UINT8 ArrayElementLength;
UINT8 DeviceArray[ASF_ALRT_SENSOR_ARRAY_LENGTH];
} EFI_ACPI_ASF_ALRT;
//
// Alert Remote Control System Actions
//
#define ASF_RCTL_DEVICES_ARRAY_LENGTH 16
typedef struct {
EFI_ACPI_ASF_RECORD_HEADER RecordHeader;
UINT8 NumberOfControls;
UINT8 ArrayElementLength;
UINT16 RctlReserved;
UINT8 ControlArray[ASF_RCTL_DEVICES_ARRAY_LENGTH];
} EFI_ACPI_ASF_RCTL;
//
// Remote Control Capabilities
//
typedef struct {
EFI_ACPI_ASF_RECORD_HEADER RecordHeader;
UINT8 RemoteControlCapabilities[7];
UINT8 RMCPCompletionCode;
UINT32 RMCPIANA;
UINT8 RMCPSpecialCommand;
UINT8 RMCPSpecialCommandParameter[2];
UINT8 RMCPBootOptions[2];
UINT8 RMCPOEMParameters[2];
} EFI_ACPI_ASF_RMCP;
//
// SMBus Devices with fixed addresses
//
#define ASF_ADDR_DEVICE_ARRAY_LENGTH 16
typedef struct {
EFI_ACPI_ASF_RECORD_HEADER RecordHeader;
UINT8 SEEPROMAddress;
UINT8 NumberOfDevices;
UINT8 FixedSmbusAddresses[ASF_ADDR_DEVICE_ARRAY_LENGTH];
} EFI_ACPI_ASF_ADDR;
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
EFI_ACPI_ASF_INFO AsfInfo;
EFI_ACPI_ASF_ALRT AsfAlert;
EFI_ACPI_ASF_RCTL AsfRctl;
EFI_ACPI_ASF_RMCP AsfRmcp;
EFI_ACPI_ASF_ADDR AsfAddr;
} EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE;
//
// "ASF!" ASF Description Table Signature
//
#define EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE_SIGNATURE 0x21465341
#pragma pack ()
#endif // _ALERT_STANDARD_FORMAT_TABLE_H

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MdePkg/Include/IndustryStandard/HighPrecisionEventTimerTable.h Normal file
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/**@file
ACPI high precision event timer table definition, defined at
ftp://download.intel.com/labs/platcomp/hpet/download/hpetspec098a.pdf.
Specification name is IA-PC HPET (High Precision Event Timers) Specification.
Copyright (c) 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _HIGH_PRECISION_EVENT_TIMER_TABLE_H_
#define _HIGH_PRECISION_EVENT_TIMER_TABLE_H_
//
// Ensure proper structure formats
//
#pragma pack(1)
//
// High Precision Event Timer Table header definition.
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 EventTimerBlockId;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE BaseAddressLower32Bit;
UINT8 HpetNumber;
UINT16 MainCounterMinimumClockTickInPeriodicMode;
UINT8 PageProtectionAndOemAttribute;
} EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_HEADER;
//
// HPET Revision (defined in spec)
//
#define EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_TABLE_REVISION 0x01
//
// Page protection setting
// Values 3 through 15 are reserved for use by the specification
//
#define EFI_ACPI_NO_PAGE_PROTECTION 0
#define EFI_ACPI_4KB_PAGE_PROTECTION 1
#define EFI_ACPI_64KB_PAGE_PROTECTION 2
#pragma pack()
#endif

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MdePkg/Include/IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h Normal file
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/**@file
ACPI memory mapped configuration space access table definition, defined at
in the PCI Firmware Specification, version 3.0 draft version 0.5.
Specification is available at http://www.pcisig.com.
Copyright (c) 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_H_
#define _MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_H_
//
// Ensure proper structure formats
//
#pragma pack(1)
//
// Memory Mapped Configuration Space Access Table (MCFG)
// This table is a basic description table header followed by
// a number of base address allocation structures.
//
typedef struct {
UINT64 BaseAddress;
UINT16 PciSegmentGroupNumber;
UINT8 StartBusNumber;
UINT8 EndBusNumber;
UINT32 Reserved;
} EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE;
//
// MCFG Revision (defined in spec)
//
#define EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION 0x01
#pragma pack()
#endif

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MdePkg/Include/IndustryStandard/SdramSpd.h Normal file
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/**@file
This file contains definitions for the SPD fields on an SDRAM.
Copyright (c) 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _SDRAM_SPD_H
#define _SDRAM_SPD_H
//
// SDRAM SPD field definitions
//
#define SPD_MEMORY_TYPE 2
#define SPD_SDRAM_ROW_ADDR 3
#define SPD_SDRAM_COL_ADDR 4
#define SPD_SDRAM_MODULE_ROWS 5
#define SPD_SDRAM_MODULE_DATA_WIDTH_LSB 6
#define SPD_SDRAM_MODULE_DATA_WIDTH_MSB 7
#define SPD_SDRAM_ECC_SUPPORT 11
#define SPD_SDRAM_REFRESH 12
#define SPD_SDRAM_WIDTH 13
#define SPD_SDRAM_ERROR_WIDTH 14
#define SPD_SDRAM_BURST_LENGTH 16
#define SPD_SDRAM_NO_OF_BANKS 17
#define SPD_SDRAM_CAS_LATENCY 18
#define SPD_SDRAM_MODULE_ATTR 21
#define SPD_SDRAM_TCLK1_PULSE 9 // cycle time for highest cas latency
#define SPD_SDRAM_TAC1_PULSE 10 // access time for highest cas latency
#define SPD_SDRAM_TCLK2_PULSE 23 // cycle time for 2nd highest cas latency
#define SPD_SDRAM_TAC2_PULSE 24 // access time for 2nd highest cas latency
#define SPD_SDRAM_TCLK3_PULSE 25 // cycle time for 3rd highest cas latency
#define SPD_SDRAM_TAC3_PULSE 26 // access time for 3rd highest cas latency
#define SPD_SDRAM_MIN_PRECHARGE 27
#define SPD_SDRAM_ACTIVE_MIN 28
#define SPD_SDRAM_RAS_CAS 29
#define SPD_SDRAM_RAS_PULSE 30
#define SPD_SDRAM_DENSITY 31
//
// Memory Type Definitions
//
#define SPD_VAL_SDR_TYPE 4 // SDR SDRAM memory
#define SPD_VAL_DDR_TYPE 7 // DDR SDRAM memory
#define SPD_VAL_DDR2_TYPE 8 // DDR2 SDRAM memory
//
// ECC Type Definitions
//
#define SPD_ECC_TYPE_NONE 0x00 // No error checking
#define SPD_ECC_TYPE_PARITY 0x01 // No error checking
#define SPD_ECC_TYPE_ECC 0x02 // Error checking only
//
// Module Attributes (Bit positions)
//
#define SPD_BUFFERED 0x01
#define SPD_REGISTERED 0x02
#endif

116
MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h Normal file
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/**@file
ACPI Serial Port Console Redirection Table as defined by Microsoft in
http://www.microsoft.com/whdc/system/platform/server/spcr.mspx
Copyright (c) 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_H_
#define _SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_H_
//
// Include files
//
#include "Acpi2_0.h"
//
// Ensure proper structure formats
//
#ifdef _MSC_EXTENSIONS
#pragma pack(1)
#endif
//
// SPCR Revision (defined in spec)
//
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISION 0x01
//
// SPCR Structure Definition
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT8 InterfaceType;
UINT8 Reserved1[3];
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE BaseAddress;
UINT8 InterruptType;
UINT8 Irq;
UINT32 GlobalSystemInterrupt;
UINT8 BaudRate;
UINT8 Parity;
UINT8 StopBits;
UINT8 FlowControl;
UINT8 TerminalType;
UINT8 Language;
UINT16 PciDeviceId;
UINT16 PciVendorId;
UINT8 PciBusNumber;
UINT8 PciDeviceNumber;
UINT8 PciFunctionNumber;
UINT32 PciFlags;
UINT8 PciSegment;
UINT32 Reserved2;
} EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE;
#ifdef _MSC_EXTENSIONS
#pragma pack()
#endif
//
// SPCR Definitions
//
//
// Interface Type
//
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16550 0
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16450 1
//
// Interrupt Type
//
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_8259 0x1
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_APIC 0x2
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_SAPIC 0x4
//
// Baud Rate
//
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_9600 3
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_19200 4
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_57600 5
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200 6
//
// Parity
//
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY 0
//
// Stop Bits
//
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1 1
//
// Flow Control
//
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_FLOW_CONTROL_DCD 0x1
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_FLOW_CONTROL_RTS_CTS 0x2
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_FLOW_CONTROL_XON_XOFF 0x4
//
// Terminal Type
//
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_VT100 0
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_VT100_PLUS 1
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_VT_UTF8 2
#define EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_ANSI 3
#endif

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/**
@file
ACPI Watchdog Resource Table as defined at
Microsoft Hardware Watchdog Timer Specification.
Copyright (c) 2006 - 2007, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef _WATCHDOG_RESOURCE_TABLE_H_
#define _WATCHDOG_RESOURCE_TABLE_H_
//
// Include files
//
#include "Acpi2_0.h"
//
// Ensure proper structure formats
//
#pragma pack(1)
//
// Watchdog Resource Table definition.
//
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ControlRegisterAddress;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE CountRegisterAddress;
UINT16 PCIDeviceID;
UINT16 PCIVendorID;
UINT8 PCIBusNumber;
UINT8 PCIDeviceNumber;
UINT8 PCIFunctionNumber;
UINT8 PCISegment;
UINT16 MaxCount;
UINT8 Units;
} EFI_ACPI_WATCHDOG_RESOURCE_1_0_TABLE;
typedef struct {
EFI_ACPI_DESCRIPTION_HEADER Header;
UINT32 WatchdogHeaderLength;
UINT8 PCISegment;
UINT8 PCIBusNumber;
UINT8 PCIDeviceNumber;
UINT8 PCIFunctionNumber;
UINT32 TimerPeriod;
UINT32 MaxCount;
UINT32 MinCount;
UINT8 WatchdogFlags;
UINT8 Reserved_57[3];
UINT32 NumberWatchdogInstructionEntries;
} EFI_ACPI_WATCHDOG_RESOURCE_2_0_TABLE;
typedef struct {
UINT8 WatchdogAction;
UINT8 InstructionFlags;
UINT8 Reserved_2;
UINT8 RegisterSize;
EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;
UINT32 Value;
UINT32 Mask;
} EFI_ACPI_WATCHDOG_RESOURCE_2_0_WATCHDOG_ACTION_INSTRUCTION_ENTRY;
#pragma pack()
//
// WDRT Revision (defined in spec)
//
#define EFI_ACPI_WATCHDOG_RESOURCE_1_0_TABLE_REVISION 0x01
#define EFI_ACPI_WATCHDOG_RESOURCE_2_0_TABLE_REVISION 0x02
//
// WDRT 1.0 Count Unit
//
#define EFI_ACPI_WDRT_1_0_COUNT_UNIT_1_SEC_PER_COUNT 1
#define EFI_ACPI_WDRT_1_0_COUNT_UNIT_100_MILLISEC_PER_COUNT 2
#define EFI_ACPI_WDRT_1_0_COUNT_UNIT_10_MILLISEC_PER_COUNT 3
//
// WDRT 2.0 Flags
//
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ENABLED 0x1
#define EFI_ACPI_WDRT_2_0_WATCHDOG_STOPPED_IN_SLEEP_STATE 0x80
//
// WDRT 2.0 Watchdog Actions
//
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_RESET 0x1
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_QUERY_CURRENT_COUNTDOWN_PERIOD 0x4
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_QUERY_COUNTDOWN_PERIOD 0x5
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_SET_COUNTDOWN_PERIOD 0x6
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_QUERY_RUNNING_STATE 0x8
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_SET_RUNNING_STATE 0x9
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_QUERY_STOPPED_STATE 0xA
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_SET_STOPPED_STATE 0xB
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_QUERY_ REBOOT 0x10
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_SET_REBOOT 0x11
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_QUERY_SHUTDOWN 0x12
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_SET_SHUTDOWN 0x13
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_QUERY_WATCHDOG_STATUS 0x20
#define EFI_ACPI_WDRT_2_0_WATCHDOG_ACTION_SET_WATCHDOG_STATUS 0x21
//
// WDRT 2.0 Watchdog Action Entry Instruction Flags
//
#define EFI_ACPI_WDRT_2_0_WATCHDOG_INSTRUCTION_READ_VALUE 0x0
#define EFI_ACPI_WDRT_2_0_WATCHDOG_INSTRUCTION_READ_COUNTDOWN 0x1
#define EFI_ACPI_WDRT_2_0_WATCHDOG_INSTRUCTION_WRITE_VALUE 0x2
#define EFI_ACPI_WDRT_2_0_WATCHDOG_INSTRUCTION_WRITE_COUNTDOWN 0x3
#define EFI_ACPI_WDRT_2_0_WATCHDOG_INSTRUCTION_PRESERVE_REGISTER 0x80
#endif