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OvmfPkg: Create initial version of PlatformInitLib 

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3863

There are 3 variants of PlatformPei in OvmfPkg:
 - OvmfPkg/PlatformPei
 - OvmfPkg/XenPlatformPei
 - OvmfPkg/Bhyve/PlatformPei/PlatformPei.inf
These PlatformPeis can share many common codes, such as
Cmos / Hob / Memory / Platform related functions. This commit
(and its following several patches) are to create a PlatformInitLib
which wraps the common code called in above PlatformPeis.

In this initial version of PlatformInitLib, below Cmos related functions
are introduced:
 - PlatformCmosRead8
 - PlatformCmosWrite8
 - PlatformDebugDumpCmos

They correspond to the functions in OvmfPkg/PlatformPei:
 - CmosRead8
 - CmosWrite8
 - DebugDumpCmos

Considering this PlatformInitLib will be used in SEC phase, global
variables and dynamic PCDs are avoided. We use PlatformInfoHob
to exchange information between functions.

EFI_HOB_PLATFORM_INFO is the data struct which contains the platform
information, such as HostBridgeDevId, BootMode, S3Supported,
SmmSmramRequire, etc.

After PlatformInitLib is created, OvmfPkg/PlatformPei is refactored
with this library.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
This commit is contained in:
Min Xu 2022-02-12 14:06:46 +08:00 committed by mergify[bot]
parent 6a608255bb
commit 57bcfc3b06
14 changed files with 183 additions and 82 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
OvmfPkg/AmdSev/AmdSevX64.dsc
View File

@ -280,6 +280,7 @@
!include OvmfPkg/OvmfTpmLibsPeim.dsc.inc
MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf
PlatformInitLib|OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
[LibraryClasses.common.DXE_CORE]
HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf

1
OvmfPkg/CloudHv/CloudHvX64.dsc
View File

@ -307,6 +307,7 @@
!include OvmfPkg/OvmfTpmLibsPeim.dsc.inc
MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf
PlatformInitLib|OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
[LibraryClasses.common.DXE_CORE]
HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf

99
OvmfPkg/Include/Library/PlatformInitLib.h Normal file
View File

@ -0,0 +1,99 @@
/** @file
PlatformInitLib header file.
Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef PLATFORM_INIT_LIB_H_
#define PLATFORM_INIT_LIB_H_
#include <PiPei.h>
#pragma pack(1)
typedef struct {
EFI_HOB_GUID_TYPE GuidHeader;
UINT16 HostBridgeDevId;
UINT64 PcdConfidentialComputingGuestAttr;
BOOLEAN SevEsIsEnabled;
UINT32 BootMode;
BOOLEAN S3Supported;
BOOLEAN SmmSmramRequire;
BOOLEAN Q35SmramAtDefaultSmbase;
UINT16 Q35TsegMbytes;
UINT64 FirstNonAddress;
UINT8 PhysMemAddressWidth;
UINT32 Uc32Base;
UINT32 Uc32Size;
BOOLEAN PcdSetNxForStack;
UINT64 PcdTdxSharedBitMask;
UINT64 PcdPciMmio64Base;
UINT64 PcdPciMmio64Size;
UINT32 PcdPciMmio32Base;
UINT32 PcdPciMmio32Size;
UINT64 PcdPciIoBase;
UINT64 PcdPciIoSize;
UINT64 PcdEmuVariableNvStoreReserved;
UINT32 PcdCpuBootLogicalProcessorNumber;
UINT32 PcdCpuMaxLogicalProcessorNumber;
UINT32 DefaultMaxCpuNumber;
UINT32 S3AcpiReservedMemoryBase;
UINT32 S3AcpiReservedMemorySize;
} EFI_HOB_PLATFORM_INFO;
#pragma pack()
/**
Reads 8-bits of CMOS data.
Reads the 8-bits of CMOS data at the location specified by Index.
The 8-bit read value is returned.
@param Index The CMOS location to read.
@return The value read.
**/
UINT8
EFIAPI
PlatformCmosRead8 (
IN UINTN Index
);
/**
Writes 8-bits of CMOS data.
Writes 8-bits of CMOS data to the location specified by Index
with the value specified by Value and returns Value.
@param Index The CMOS location to write.
@param Value The value to write to CMOS.
@return The value written to CMOS.
**/
UINT8
EFIAPI
PlatformCmosWrite8 (
IN UINTN Index,
IN UINT8 Value
);
/**
Dump the CMOS content
*/
VOID
EFIAPI
PlatformDebugDumpCmos (
VOID
);
#endif // PLATFORM_INIT_LIB_H_

32
OvmfPkg/PlatformPei/Cmos.c → OvmfPkg/Library/PlatformInitLib/Cmos.c
View File

@ -6,7 +6,8 @@
**/
#include "Cmos.h"
#include <Library/PlatformInitLib.h>
#include <Library/DebugLib.h>
#include "Library/IoLib.h"
/**
@ -22,7 +23,7 @@
**/
UINT8
EFIAPI
CmosRead8 (
PlatformCmosRead8 (
IN UINTN Index
)
{
@ -44,7 +45,7 @@ CmosRead8 (
**/
UINT8
EFIAPI
CmosWrite8 (
PlatformCmosWrite8 (
IN UINTN Index,
IN UINT8 Value
)
@ -53,3 +54,28 @@ CmosWrite8 (
IoWrite8 (0x71, Value);
return Value;
}
/**
Dump the CMOS content
*/
VOID
EFIAPI
PlatformDebugDumpCmos (
VOID
)
{
UINT32 Loop;
DEBUG ((DEBUG_INFO, "CMOS:\n"));
for (Loop = 0; Loop < 0x80; Loop++) {
if ((Loop % 0x10) == 0) {
DEBUG ((DEBUG_INFO, "%02x:", Loop));
}
DEBUG ((DEBUG_INFO, " %02x", PlatformCmosRead8 (Loop)));
if ((Loop % 0x10) == 0xf) {
DEBUG ((DEBUG_INFO, "\n"));
}
}
}

36
OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf Normal file
View File

@ -0,0 +1,36 @@
## @file
# Platform Initialization Lib
#
# This module provides platform specific function to detect boot mode.
# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = PlatformInitLib
FILE_GUID = 89f886b0-7109-46e1-9d28-503ad4ab6ee0
MODULE_TYPE = BASE
VERSION_STRING = 1.0
LIBRARY_CLASS = PlatformInitLib|PEIM
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64 EBC
#
[Sources]
Cmos.c
[Packages]
MdeModulePkg/MdeModulePkg.dec
MdePkg/MdePkg.dec
OvmfPkg/OvmfPkg.dec
[LibraryClasses]
BaseLib
DebugLib
IoLib

1
OvmfPkg/Microvm/MicrovmX64.dsc
View File

@ -300,6 +300,7 @@
QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf
MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf
PlatformInitLib|OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
[LibraryClasses.common.DXE_CORE]
HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf

4
OvmfPkg/OvmfPkg.dec
View File

@ -113,6 +113,10 @@
#
TdxMailboxLib|Include/Library/TdxMailboxLib.h
## @libraryclass PlatformInitLib
#
PlatformInitLib|Include/Library/PlatformInitLib.h
[Guids]
gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}
gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}

1
OvmfPkg/OvmfPkgIa32.dsc
View File

@ -300,6 +300,7 @@
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/PeiQemuFwCfgS3LibFwCfg.inf
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf
PlatformInitLib|OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
!include OvmfPkg/OvmfTpmLibsPeim.dsc.inc

1
OvmfPkg/OvmfPkgIa32X64.dsc
View File

@ -304,6 +304,7 @@
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/PeiQemuFwCfgS3LibFwCfg.inf
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf
PlatformInitLib|OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
!include OvmfPkg/OvmfTpmLibsPeim.dsc.inc

1
OvmfPkg/OvmfPkgX64.dsc
View File

@ -305,6 +305,7 @@
QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/PeiQemuFwCfgS3LibFwCfg.inf
PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf
PlatformInitLib|OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
!include OvmfPkg/OvmfTpmLibsPeim.dsc.inc

48
OvmfPkg/PlatformPei/Cmos.h
View File

@ -1,48 +0,0 @@
/** @file
PC/AT CMOS access routines
Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef __CMOS_H__
#define __CMOS_H__
/**
Reads 8-bits of CMOS data.
Reads the 8-bits of CMOS data at the location specified by Index.
The 8-bit read value is returned.
@param Index The CMOS location to read.
@return The value read.
**/
UINT8
EFIAPI
CmosRead8 (
IN UINTN Index
);
/**
Writes 8-bits of CMOS data.
Writes 8-bits of CMOS data to the location specified by Index
with the value specified by Value and returns Value.
@param Index The CMOS location to write.
@param Value The value to write to CMOS.
@return The value written to CMOS.
**/
UINT8
EFIAPI
CmosWrite8 (
IN UINTN Index,
IN UINT8 Value
);
#endif

8
OvmfPkg/PlatformPei/MemDetect.c
View File

@ -37,9 +37,9 @@ Module Name:
#include <Library/MtrrLib.h>
#include <Library/QemuFwCfgLib.h>
#include <Library/QemuFwCfgSimpleParserLib.h>
#include <Library/PlatformInitLib.h>
#include "Platform.h"
#include "Cmos.h"
UINT8 mPhysMemAddressWidth;
@ -412,8 +412,8 @@ GetSystemMemorySizeBelow4gb (
// into the calculation to get the total memory size.
//
Cmos0x34 = (UINT8)CmosRead8 (0x34);
Cmos0x35 = (UINT8)CmosRead8 (0x35);
Cmos0x34 = (UINT8)PlatformCmosRead8 (0x34);
Cmos0x35 = (UINT8)PlatformCmosRead8 (0x35);
return (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);
}
@ -436,7 +436,7 @@ GetSystemMemorySizeAbove4gb (
Size = 0;
for (CmosIndex = 0x5d; CmosIndex >= 0x5b; CmosIndex--) {
Size = (UINT32)(Size << 8) + (UINT32)CmosRead8 (CmosIndex);
Size = (UINT32)(Size << 8) + (UINT32)PlatformCmosRead8 (CmosIndex);
}
return LShiftU64 (Size, 16);

29
OvmfPkg/PlatformPei/Platform.c
View File

@ -36,10 +36,10 @@
#include <IndustryStandard/Pci22.h>
#include <IndustryStandard/Q35MchIch9.h>
#include <IndustryStandard/QemuCpuHotplug.h>
#include <Library/PlatformInitLib.h>
#include <OvmfPlatforms.h>
#include "Platform.h"
#include "Cmos.h"
EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
{
@ -505,11 +505,11 @@ BootModeInitialization (
{
EFI_STATUS Status;
if (CmosRead8 (0xF) == 0xFE) {
if (PlatformCmosRead8 (0xF) == 0xFE) {
mBootMode = BOOT_ON_S3_RESUME;
}
CmosWrite8 (0xF, 0x00);
PlatformCmosWrite8 (0xF, 0x00);
Status = PeiServicesSetBootMode (mBootMode);
ASSERT_EFI_ERROR (Status);
@ -546,27 +546,6 @@ ReserveEmuVariableNvStore (
ASSERT_RETURN_ERROR (PcdStatus);
}
VOID
DebugDumpCmos (
VOID
)
{
UINT32 Loop;
DEBUG ((DEBUG_INFO, "CMOS:\n"));
for (Loop = 0; Loop < 0x80; Loop++) {
if ((Loop % 0x10) == 0) {
DEBUG ((DEBUG_INFO, "%02x:", Loop));
}
DEBUG ((DEBUG_INFO, " %02x", CmosRead8 (Loop)));
if ((Loop % 0x10) == 0xf) {
DEBUG ((DEBUG_INFO, "\n"));
}
}
}
VOID
S3Verification (
VOID
@ -810,7 +789,7 @@ InitializePlatform (
DEBUG ((DEBUG_INFO, "Platform PEIM Loaded\n"));
DebugDumpCmos ();
PlatformDebugDumpCmos ();
if (QemuFwCfgS3Enabled ()) {
DEBUG ((DEBUG_INFO, "S3 support was detected on QEMU\n"));

3
OvmfPkg/PlatformPei/PlatformPei.inf
View File

@ -25,8 +25,6 @@
[Sources]
AmdSev.c
ClearCache.c
Cmos.c
Cmos.h
FeatureControl.c
Fv.c
MemDetect.c
@ -64,6 +62,7 @@
MemEncryptSevLib
PcdLib
VmgExitLib
PlatformInitLib
[Pcd]
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase