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UefiCpuPkg/PiSmmCpuDxeSmm: Reduce one round BSP & AP sync 

After BSP returned from SmmCoreEntry, there are several rounds BSP
and AP sync in BSP handler:

1 .ReleaseAllAPs();  /// Notify all APs to exit.
if (SmmCpuFeaturesNeedConfigureMtrrs()) {
  2. SmmCpuSyncWaitForAPs(); /// Wait for all APs to program MTRRs.
  3. ReleaseAllAPs(); /// Signal APs to restore MTRRs.
}

4. SmmCpuSyncWaitForAPs(); /// Wait for all APs to complete pending
                               tasks including MTRR.
5. ReleaseAllAPs(); /// Signal APs to Reset states.

6. SmmCpuSyncWaitForAPs(); /// Gather APs to exit SMM synchronously.

Before step 6 and after step 5, BSP performs below items:
A. InitializeDebugAgent() /// Stop source level debug.
B. SmmCpuUpdate() /// Perform pending operations for hot-plug.
C. Present = FALSE; /// Clear the Present flag of BSP.

For InitializeDebugAgent(), BSP needs to wait all APs complete
pending tasks and then notify all APs to stop source level debug.
So, above step 4 & step 5 are required for InitializeDebugAgent().

For SmmCpuUpdate(), it's to perform pending operations for
hot-plug CPUs take effect in next SMI. Existing APs in SMI do not
reply on the CPU switch & hot-add & hot-remove operations. So, no
need step 4 and step 5 for additional one round BSP & AP sync.
Step 6 can make sure all APs are ready to exit SMM, then hot-plug
operation can take effect in next SMI.

For BSP "Present" flag, AP does not reply on it. No need step 4
and step 5 for additional one round BSP & AP sync.

Based on above analysis, step 4 and step 5 are only required if
need configure MTRR and support SMM source level debug. So, we can
reduce one round BSP and AP sync if both are unsupported. With
this change, SMI performance can be improved.

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@Intel.com>
This commit is contained in:
Jiaxin Wu 2023-12-15 16:56:31 +08:00 committed by mergify[bot]
parent 41d1c4475b
commit 58d9463939
1 changed files with 20 additions and 16 deletions
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36
UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
View File

@ -645,15 +645,17 @@ BSPHandler (
MtrrSetAllMtrrs (&Mtrrs);
}
//
// Wait for all APs to complete their pending tasks including MTRR programming if needed.
//
SmmCpuSyncWaitForAPs (mSmmMpSyncData->SyncContext, ApCount, CpuIndex);
if (SmmCpuFeaturesNeedConfigureMtrrs () || mSmmDebugAgentSupport) {
//
// Wait for all APs to complete their pending tasks including MTRR programming if needed.
//
SmmCpuSyncWaitForAPs (mSmmMpSyncData->SyncContext, ApCount, CpuIndex);
//
// Signal APs to Reset states/semaphore for this processor
//
ReleaseAllAPs ();
//
// Signal APs to Reset states/semaphore for this processor
//
ReleaseAllAPs ();
}
if (mSmmDebugAgentSupport) {
//
@ -896,15 +898,17 @@ APHandler (
MtrrSetAllMtrrs (&Mtrrs);
}
//
// Notify BSP the readiness of this AP to Reset states/semaphore for this processor
//
SmmCpuSyncReleaseBsp (mSmmMpSyncData->SyncContext, CpuIndex, BspIndex);
if (SmmCpuFeaturesNeedConfigureMtrrs () || mSmmDebugAgentSupport) {
//
// Notify BSP the readiness of this AP to Reset states/semaphore for this processor
//
SmmCpuSyncReleaseBsp (mSmmMpSyncData->SyncContext, CpuIndex, BspIndex);
//
// Wait for the signal from BSP to Reset states/semaphore for this processor
//
SmmCpuSyncWaitForBsp (mSmmMpSyncData->SyncContext, CpuIndex, BspIndex);
//
// Wait for the signal from BSP to Reset states/semaphore for this processor
//
SmmCpuSyncWaitForBsp (mSmmMpSyncData->SyncContext, CpuIndex, BspIndex);
}
//
// Reset states/semaphore for this processor