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SourceLevelDebugPkg: Pack CPU context structures 

Use #pragma pack to ensure that ASM and C code agree on
the structure layout between various compilers.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11331 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
jljusten 2011-02-22 16:36:12 +00:00
parent 2094c4d03f
commit 59424fff04
2 changed files with 9 additions and 2 deletions
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6
SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchRegisters.h
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@ -1,7 +1,7 @@
/** @file /** @file
IA32 register defintions needed by debug transfer protocol. IA32 register defintions needed by debug transfer protocol.
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR> Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -15,6 +15,8 @@
#ifndef _ARCH_REGISTERS_H_ #ifndef _ARCH_REGISTERS_H_
#define _ARCH_REGISTERS_H_ #define _ARCH_REGISTERS_H_
#pragma pack(1)
/// ///
/// FXSAVE_STATE /// FXSAVE_STATE
/// FP / MMX / XMM registers (see fxrstor instruction definition) /// FP / MMX / XMM registers (see fxrstor instruction definition)
@ -153,4 +155,6 @@ typedef struct {
UINT32 TssBas; UINT32 TssBas;
} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE_IA32; } DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE_IA32;
#pragma pack()
#endif #endif

5
SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchRegisters.h
View File

@ -1,7 +1,7 @@
/** @file /** @file
X64 register defintions needed by debug transfer protocol. X64 register defintions needed by debug transfer protocol.
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR> Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -15,6 +15,8 @@
#ifndef _ARCH_REGISTERS_H_ #ifndef _ARCH_REGISTERS_H_
#define _ARCH_REGISTERS_H_ #define _ARCH_REGISTERS_H_
#pragma pack(1)
/// ///
/// FXSAVE_STATE (promoted operation) /// FXSAVE_STATE (promoted operation)
/// FP / MMX / XMM registers (see fxrstor instruction definition) /// FP / MMX / XMM registers (see fxrstor instruction definition)
@ -325,5 +327,6 @@ typedef struct {
UINT64 Tssas; UINT64 Tssas;
} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGMENT_BASES_X64; } DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGMENT_BASES_X64;
#pragma pack()
#endif #endif