mirror of https://github.com/acidanthera/audk.git
CorebootPayloadPkg: Assume no PCI serial devices
Set the vendor to 0xffff which indicates the end of the list. Change-Id: If6475e04d3675f0a932571a85d1dd3f301416b6a Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> eviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
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@ -67,10 +67,10 @@
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# UINT8 Reserved[2];
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# } PCI_SERIAL_PARAMETER;
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#
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# Vendor 0000 Device 0000 Prog Interface 1, BAR #0, Offset 0, Stride = 1, Clock 1843200 (0x1c2000)
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# Vendor FFFF Device 0000 Prog Interface 1, BAR #0, Offset 0, Stride = 1, Clock 1843200 (0x1c2000)
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#
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# [Vendor] [Device] [----ClockRate---] [------------Offset-----------] [Bar] [Stride] [RxFifo] [TxFifo] [Rsvd] [Vendor]
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DEFINE PCI_SERIAL_PARAMETERS = {0x00,0x00, 0x00,0x00, 0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00, 0x01, 0x0,0x0, 0x0,0x0, 0x0,0x0, 0xff,0xff}
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DEFINE PCI_SERIAL_PARAMETERS = {0xff,0xff, 0x00,0x00, 0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00, 0x01, 0x0,0x0, 0x0,0x0, 0x0,0x0, 0xff,0xff}
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#
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# Shell options: [BUILD_SHELL, FULL_BIN, MIN_BIN, NONE, UEFI]
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@ -67,10 +67,10 @@
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# UINT8 Reserved[2];
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# } PCI_SERIAL_PARAMETER;
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#
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# Vendor 0000 Device 0000 Prog Interface 1, BAR #0, Offset 0, Stride = 1, Clock 1843200 (0x1c2000)
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# Vendor FFFF Device 0000 Prog Interface 1, BAR #0, Offset 0, Stride = 1, Clock 1843200 (0x1c2000)
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#
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# [Vendor] [Device] [----ClockRate---] [------------Offset-----------] [Bar] [Stride] [RxFifo] [TxFifo] [Rsvd] [Vendor]
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DEFINE PCI_SERIAL_PARAMETERS = {0x00,0x00, 0x00,0x00, 0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00, 0x01, 0x0,0x0, 0x0,0x0, 0x0,0x0, 0xff,0xff}
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DEFINE PCI_SERIAL_PARAMETERS = {0xff,0xff, 0x00,0x00, 0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00, 0x01, 0x0,0x0, 0x0,0x0, 0x0,0x0, 0xff,0xff}
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#
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# Shell options: [BUILD_SHELL, FULL_BIN, MIN_BIN, NONE, UEFI]
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