mirror of https://github.com/acidanthera/audk.git
MdeModulePkg/XhciDxe: enable 64-bit PCI DMA
PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute if the controller supports 64-bit DMA addressing. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Feng Tian <feng.tian@Intel.com>
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@ -125,7 +125,7 @@ XhcGetCapability (
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Xhc = XHC_FROM_THIS (This);
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*MaxSpeed = EFI_USB_SPEED_SUPER;
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*PortNumber = (UINT8) (Xhc->HcSParams1.Data.MaxPorts);
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*Is64BitCapable = (UINT8) (Xhc->HcCParams.Data.Ac64);
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*Is64BitCapable = (UINT8) Xhc->Support64BitDma;
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DEBUG ((EFI_D_INFO, "XhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable));
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gBS->RestoreTPL (OldTpl);
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@ -2020,6 +2020,26 @@ XhcDriverBindingStart (
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return EFI_OUT_OF_RESOURCES;
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}
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//
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// Enable 64-bit DMA support in the PCI layer if this controller
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// supports it.
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//
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if (Xhc->HcCParams.Data.Ac64 != 0) {
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Status = PciIo->Attributes (
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PciIo,
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EfiPciIoAttributeOperationEnable,
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EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
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NULL
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);
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if (!EFI_ERROR (Status)) {
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Xhc->Support64BitDma = TRUE;
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} else {
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DEBUG ((EFI_D_WARN,
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"%a: failed to enable 64-bit DMA on 64-bit capable controller @ %p (%r)\n",
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__FUNCTION__, Controller, Status));
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}
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}
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XhcSetBiosOwnership (Xhc);
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XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
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@ -256,6 +256,8 @@ struct _USB_XHCI_INSTANCE {
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// The array supports up to 255 devices, entry 0 is reserved and should not be used.
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//
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USB_DEV_CONTEXT UsbDevContext[256];
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BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device
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};
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