tyler.durden
/
audk
mirror of https://github.com/acidanthera/audk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

MdePkg/include: Add DMAR SATC Table Definition 

SoC Integrated Address Translation Cache (SATC) reporting structure is one
of the Remapping Structure, which is imported since Intel(R) Virtualization
Technology for Directed I/O (VT-D) Architecture Specification v3.2.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3109

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jenny Huang <jenny.huang@intel.com>
Cc: Kowalewski Robert <robert.kowalewski@intel.com>
Cc: Feng Roger <roger.feng@intel.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
This commit is contained in:
Sheng Wei 2020-12-07 16:34:44 +08:00 committed by mergify[bot]
parent 532f907b75
commit 5c3cdebf95
1 changed files with 31 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h
View File

@ -2,13 +2,13 @@
DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R) DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
Virtualization Technology for Directed I/O (VT-D) Architecture Specification. Virtualization Technology for Directed I/O (VT-D) Architecture Specification.
Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR> Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference: @par Revision Reference:
- Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture - Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture
Specification v2.5, Dated November 2017. Specification v3.2, Dated October 2020.
http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf https://software.intel.com/content/dam/develop/external/us/en/documents/vt-directed-io-spec.pdf
@par Glossary: @par Glossary:
- HPET - High Precision Event Timer - HPET - High Precision Event Timer
@ -39,6 +39,7 @@
#define EFI_ACPI_DMAR_TYPE_ATSR 0x02 #define EFI_ACPI_DMAR_TYPE_ATSR 0x02
#define EFI_ACPI_DMAR_TYPE_RHSA 0x03 #define EFI_ACPI_DMAR_TYPE_RHSA 0x03
#define EFI_ACPI_DMAR_TYPE_ANDD 0x04 #define EFI_ACPI_DMAR_TYPE_ANDD 0x04
#define EFI_ACPI_DMAR_TYPE_SATC 0x05
///@} ///@}
/// ///
@ -216,6 +217,32 @@ typedef struct {
UINT8 AcpiDeviceNumber; UINT8 AcpiDeviceNumber;
} EFI_ACPI_DMAR_ANDD_HEADER; } EFI_ACPI_DMAR_ANDD_HEADER;
/**
An SoC Integrated Address Translation Cache (SATC) reporting structure is
defined in section 8.8.
**/
typedef struct {
EFI_ACPI_DMAR_STRUCTURE_HEADER Header;
/**
- Bit[0]: ATC_REQUIRED:
- If Set, indicates that every SoC integrated device enumerated
in this table has a functional requirement to enable its ATC
(via the ATS capability) for device operation.
- If Clear, any device enumerated in this table can operate when
its respective ATC is not enabled (albeit with reduced
performance or functionality).
- Bits[7:1] Reserved.
**/
UINT8 Flags;
UINT8 Reserved;
///
/// The PCI Segment associated with this SATC structure. All SoC integrated
/// devices within a PCI segment with same value for Flags field must be
/// enumerated in the same SATC structure.
///
UINT16 SegmentNumber;
} EFI_ACPI_DMAR_SATC_HEADER;
/** /**
DMA Remapping Reporting Structure Header as defined in section 8.1 DMA Remapping Reporting Structure Header as defined in section 8.1
This header will be followed by list of Remapping Structures listed below This header will be followed by list of Remapping Structures listed below
@ -224,6 +251,7 @@ typedef struct {
- Root Port ATS Capability Reporting (ATSR) - Root Port ATS Capability Reporting (ATSR)
- Remapping Hardware Static Affinity (RHSA) - Remapping Hardware Static Affinity (RHSA)
- ACPI Name-space Device Declaration (ANDD) - ACPI Name-space Device Declaration (ANDD)
- SoC Integrated Address Translation Cache reporting (SATC)
These structure types must by reported in numerical order. These structure types must by reported in numerical order.
i.e., All remapping structures of type 0 (DRHD) enumerated before remapping i.e., All remapping structures of type 0 (DRHD) enumerated before remapping
structures of type 1 (RMRR), and so forth. structures of type 1 (RMRR), and so forth.