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UefiCpuPkg/MpInitLib: Add EnableExecuteDisable in MP_CPU_EXCHANGE_INFO 

EnableExecuteDisable in MP_CPU_EXCHANGE_INFO is used to tell AP reset vector if
enable execute disable feature on APs. This feature should be enabled before CR3
is written.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Michael Kinney <michael.d.kinney@intel.com>
This commit is contained in:
Jeff Fan 2016-07-29 21:13:34 +08:00
parent 8396e2dd30
commit 5c66d125ea
5 changed files with 49 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
View File

@ -36,4 +36,6 @@ ModeOffsetLocation equ LockLocation + 20h
NumApsExecutingLocation equ LockLocation + 24h
CodeSegmentLocation equ LockLocation + 28h
DataSegmentLocation equ LockLocation + 2Ch
EnableExecuteDisableLocation equ LockLocation + 30h
Cr3Location equ LockLocation + 3Ch

30
UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
View File

@ -85,6 +85,36 @@ Flat32Start: ; protected mode entry point
mov ss, dx
mov esi, ebx
mov edi, esi
add edi, EnableExecuteDisableLocation
cmp byte [edi], 0
jz SkipEnableExecuteDisable
;
; Enable IA32 PAE execute disable
;
mov ecx, 0xc0000080
rdmsr
bts eax, 11
wrmsr
mov edi, esi
add edi, Cr3Location
mov eax, dword [edi]
mov cr3, eax
mov eax, cr4
bts eax, 5
mov cr4, eax
mov eax, cr0
bts eax, 31
mov cr0, eax
SkipEnableExecuteDisable:
mov edi, esi
add edi, LockLocation
mov eax, NotVacantFlag

1
UefiCpuPkg/Library/MpInitLib/MpLib.h
View File

@ -55,6 +55,7 @@ typedef struct {
UINTN NumApsExecuting;
UINTN CodeSegment;
UINTN DataSegment;
UINTN EnableExecuteDisable;
UINTN Cr3;
} MP_CPU_EXCHANGE_INFO;

4
UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
View File

@ -36,6 +36,8 @@ ModeOffsetLocation equ LockLocation + 3Ch
NumApsExecutingLocation equ LockLocation + 44h
CodeSegmentLocation equ LockLocation + 4Ch
DataSegmentLocation equ LockLocation + 54h
Cr3Location equ LockLocation + 5Ch
EnableExecuteDisableLocation equ LockLocation + 5Ch
Cr3Location equ LockLocation + 64h
;-------------------------------------------------------------------------------

13
UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
View File

@ -69,6 +69,19 @@ o32 lgdt [cs:si]
mov si, IdtrLocation
o32 lidt [cs:si]
mov si, EnableExecuteDisableLocation
cmp byte [si], 0
jz SkipEnableExecuteDisableBit
;
; Enable execute disable bit
;
mov ecx, 0c0000080h ; EFER MSR number
rdmsr ; Read EFER
bts eax, 11 ; Enable Execute Disable Bit
wrmsr ; Write EFER
SkipEnableExecuteDisableBit:
mov di, DataSegmentLocation
mov edi, [di] ; Save long mode DS in edi