mirror of https://github.com/acidanthera/audk.git
MdedulePkg: AtaAtapiPassThru: Remove polling on PxCMD.FR flag setting
It is enough to set PxCMD.FRE bit, which cause HBA to post received FISes into the FIS receive area. According to AHCI Specification, only polling on PxCMD.FRE to be cleared is necessary, when it is needeed to stop FIS engine (eg. in order to change PxCMD.FB address). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jan Dabros <jsd@semihalf.com> Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
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@ -427,13 +427,7 @@ AhciEnableFisReceive (
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Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
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Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
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AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE);
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AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE);
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return AhciWaitMmioSet (
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return EFI_SUCCESS;
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PciIo,
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Offset,
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EFI_AHCI_PORT_CMD_FR,
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EFI_AHCI_PORT_CMD_FR,
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Timeout
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);
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}
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}
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/**
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/**
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@ -2344,16 +2338,6 @@ AhciModeInitialization (
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//
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//
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Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
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Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
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AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE);
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AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE);
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Status = AhciWaitMmioSet (
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PciIo,
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Offset,
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EFI_AHCI_PORT_CMD_FR,
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EFI_AHCI_PORT_CMD_FR,
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EFI_AHCI_PORT_CMD_FR_CLEAR_TIMEOUT
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);
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if (EFI_ERROR (Status)) {
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continue;
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}
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//
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//
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// Wait no longer than 10 ms to wait the Phy to detect the presence of a device.
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// Wait no longer than 10 ms to wait the Phy to detect the presence of a device.
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