ArmPkg/ArmGic: Added GicV3 detection

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Signed-off-by: Harry Liebel <Harry.Liebel@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16232 6f19259b-4bc3-4df7-8a09-765794883524

ArmPkg/Drivers/ArmGic/AArch64/ArmGicArchLib.c

@@ -0,0 +1,35 @@
+/** @file
+*
+*  Copyright (c) 2014, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/ArmLib.h>
+#include <Library/ArmGicLib.h>
+
+ARM_GIC_ARCH_REVISION
+EFIAPI
+ArmGicGetSupportedArchRevision (
+  VOID
+  )
+{
+  // Ideally we would like to use the GICC IIDR Architecture version here, but
+  // this does not seem to be very reliable as the implementation could easily
+  // get it wrong. It is more reliable to check if the GICv3 System Register
+  // feature is implemented on the CPU. This is also convenient as our GICv3
+  // driver requires SRE. If only Memory mapped access is available we try to
+  // drive the GIC as a v2.
+  if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC) {
+    return ARM_GIC_ARCH_REVISION_3;
+  }
+
+  return ARM_GIC_ARCH_REVISION_2;
+}

ArmPkg/Drivers/ArmGic/Arm/ArmGicArchLib.c

@@ -0,0 +1,35 @@
+/** @file
+*
+*  Copyright (c) 2014, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials are licensed and made available
+*  under the terms and conditions of the BSD License which accompanies this
+*  distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Library/ArmLib.h>
+#include <Library/ArmGicLib.h>
+
+ARM_GIC_ARCH_REVISION
+EFIAPI
+ArmGicGetSupportedArchRevision (
+  VOID
+  )
+{
+  // Ideally we would like to use the GICC IIDR Architecture version here, but
+  // this does not seem to be very reliable as the implementation could easily
+  // get it wrong. It is more reliable to check if the GICv3 System Register
+  // feature is implemented on the CPU. This is also convenient as our GICv3
+  // driver requires SRE. If only Memory mapped access is available we try to
+  // drive the GIC as a v2.
+  if (ArmReadIdPfr1 () & ARM_PFR1_GIC) {
+    return ARM_GIC_ARCH_REVISION_3;
+  }
+
+  return ARM_GIC_ARCH_REVISION_2;
+}

ArmPkg/Drivers/ArmGic/ArmGicLib.c

@@ -19,15 +19,6 @@
 
 #include "GicV2/ArmGicV2Lib.h"
 
-ARM_GIC_ARCH_REVISION
-EFIAPI
-ArmGicGetSupportedArchRevision (
-  VOID
-  )
-{
-  return ARM_GIC_ARCH_REVISION_2;
-}
-
 UINTN
 EFIAPI
 ArmGicGetInterfaceIdentification (

ArmPkg/Drivers/ArmGic/ArmGicLib.inf

@@ -26,7 +26,14 @@
   GicV2/ArmGicV2Lib.c
   GicV2/ArmGicV2NonSecLib.c
 
+[Sources.ARM]
+  Arm/ArmGicArchLib.c
+
+[Sources.AARCH64]
+  AArch64/ArmGicArchLib.c
+
 [LibraryClasses]
+  ArmLib
   DebugLib
   IoLib
 

ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf

@@ -26,6 +26,12 @@
   GicV2/ArmGicV2Lib.c
   GicV2/ArmGicV2SecLib.c
 
+[Sources.ARM]
+  Arm/ArmGicArchLib.c
+
+[Sources.AARCH64]
+  AArch64/ArmGicArchLib.c
+
 [Packages]
   ArmPkg/ArmPkg.dec
   ArmPlatformPkg/ArmPlatformPkg.dec
@@ -34,7 +40,5 @@
 
 [LibraryClasses]
   ArmLib
-  ArmPlatformLib
   DebugLib
   IoLib
-  PcdLib

ArmPkg/Include/Library/ArmGicLib.h

@@ -19,7 +19,8 @@
 // GIC definitions
 //
 typedef enum {
-  ARM_GIC_ARCH_REVISION_2
+  ARM_GIC_ARCH_REVISION_2,
+  ARM_GIC_ARCH_REVISION_3
 } ARM_GIC_ARCH_REVISION;
 
 //