mirror of https://github.com/acidanthera/audk.git
StandaloneMmPkg: Introduce PI_MM_CPU_DRIVER_EP protocol.
This patch introduces a PI_MM_CPU_DRIVER_EP protocol to handle Mmcommunication request based on the CPU driver. Previously the CPU driver entry point was retrieved using the gEfiArmTfCpuDriverEntryPoint HOB. However, this practice is incorrect as StandaloneMM must be a HOB consumer and not a HOB producer. Therefore, remove the CPU entry HOB gEfiArmTfCpuDriverEntryPoint, and replace it with the CPU driver entry protocol EDKII_PI_MM_CPU_DRIVER_EP_PROTOCOL. The EDKII_PI_MM_CPU_DRIVER_EP_PROTOCOL installed in StandaloneMmCpuInitialize() will be used by the code in Arm/StandaloneMmCoreEntryPoint. This protocol is used like below: +=====+ |StandaloneMmCore| +=====+ | CEntryPoint() =================== | ProcessModuleEntryPointList() | +--> StandaloneMmMain() ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | // Load StandaloneMmCpu driver which implements | // CpuDriverEntryPoint used by DelegatedEventLoop(). | // and install the gEdkiiPiMmCpuDriverEpProtocolGuid. -------------- | ... // Get CpuDriverEntryPoint implemented by // StandaloneMmCpu driver with gEdkiiPiMmCpuDriverEpProtocolGuid | DelegatedEventLoop() // Handle request by delegating it to // CpuDriverEntryPoint. Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
This commit is contained in:
parent
62127dfbc7
commit
6087382c62
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@ -54,6 +54,10 @@ EFI_MM_CONFIGURATION_PROTOCOL mMmConfig = {
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MmFoundationEntryRegister
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};
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EDKII_PI_MM_CPU_DRIVER_EP_PROTOCOL mPiMmCpuDriverEpProtocol = {
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PiMmStandaloneMmCpuDriverEntry
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};
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STATIC EFI_MM_ENTRY_POINT mMmEntryPoint = NULL;
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/**
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@ -2,7 +2,7 @@
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2016 HP Development Company, L.P.
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Copyright (c) 2016 - 2021, Arm Limited. All rights reserved.
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Copyright (c) 2016 - 2024, Arm Limited. All rights reserved.
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Copyright (c) 2023, Ventana Micro System Inc. All rights reserved.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -26,10 +26,11 @@
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// World
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extern EFI_GUID gEfiStandaloneMmNonSecureBufferGuid;
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// GUID to identify HOB where the entry point of this CPU driver will be
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// populated to allow the entry point driver to invoke it upon receipt of an
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// event
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extern EFI_GUID gEfiMmCpuDriverEpDescriptorGuid;
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//
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// mPiMmCpuDriverEpProtocol for Cpu driver entry point to handle
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// mm communication event.
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//
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extern EDKII_PI_MM_CPU_DRIVER_EP_PROTOCOL mPiMmCpuDriverEpProtocol;
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//
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// Private copy of the MM system table for future use
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@ -94,7 +95,6 @@ StandaloneMmCpuInitialize (
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IN EFI_MM_SYSTEM_TABLE *SystemTable // not actual systemtable
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)
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{
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MM_CPU_DRIVER_EP_DESCRIPTOR *CpuDriverEntryPointDesc;
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EFI_CONFIGURATION_TABLE *ConfigurationTable;
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MP_INFORMATION_HOB_DATA *MpInformationHobData;
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EFI_MMRAM_DESCRIPTOR *NsCommBufMmramRange;
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@ -120,6 +120,19 @@ StandaloneMmCpuInitialize (
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return Status;
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}
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// Install entry point of this CPU driver to allow
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// the entry point driver to be invoked upon receipt of an event in
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// DelegatedEventLoop.
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Status = mMmst->MmInstallProtocolInterface (
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&mMmCpuHandle,
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&gEdkiiPiMmCpuDriverEpProtocolGuid,
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EFI_NATIVE_INTERFACE,
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&mPiMmCpuDriverEpProtocol
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);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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// register the root MMI handler
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Status = mMmst->MmiHandlerRegister (
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PiMmCpuTpFwRootMmiHandler,
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@ -147,28 +160,6 @@ StandaloneMmCpuInitialize (
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HobStart = ConfigurationTable[Index].VendorTable;
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//
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// Locate the HOB with the buffer to populate the entry point of this driver
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//
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Status = GetGuidedHobData (
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HobStart,
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&gEfiMmCpuDriverEpDescriptorGuid,
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(VOID **)&CpuDriverEntryPointDesc
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "MmCpuDriverEpDesc HOB data extraction failed - 0x%x\n", Status));
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return Status;
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}
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// Share the entry point of the CPU driver
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DEBUG ((
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DEBUG_INFO,
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"Sharing Cpu Driver EP *0x%lx = 0x%lx\n",
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(UINTN)CpuDriverEntryPointDesc->MmCpuDriverEpPtr,
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(UINTN)PiMmStandaloneMmCpuDriverEntry
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));
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*(CpuDriverEntryPointDesc->MmCpuDriverEpPtr) = PiMmStandaloneMmCpuDriverEntry;
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// Find the descriptor that contains the whereabouts of the buffer for
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// communication with the Normal world.
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Status = GetGuidedHobData (
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@ -36,6 +36,7 @@
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[Protocols]
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gEfiMmConfigurationProtocolGuid # PROTOCOL ALWAYS_PRODUCED
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gEfiMmCpuProtocolGuid # PROTOCOL ALWAYS_PRODUCED
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gEdkiiPiMmCpuDriverEpProtocolGuid # PROTOCOL ALWAYS_PRODUCED
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[Guids]
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gEfiHobListGuid
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@ -43,7 +44,6 @@
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gZeroGuid
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gMpInformationHobGuid
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gEfiStandaloneMmNonSecureBufferGuid
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gEfiMmCpuDriverEpDescriptorGuid
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[Depex]
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TRUE
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@ -126,7 +126,6 @@ LocateStandaloneMmCorePeCoffData (
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Use the boot information passed by privileged firmware to populate a HOB list
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suitable for consumption by the MM Core and drivers.
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@param [in, out] CpuDriverEntryPoint Address of MM CPU driver entrypoint
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@param [in] PayloadBootInfo Boot information passed by privileged
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firmware
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@ -134,7 +133,6 @@ LocateStandaloneMmCorePeCoffData (
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VOID *
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EFIAPI
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CreateHobListFromBootInfo (
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IN OUT PI_MM_CPU_DRIVER_ENTRYPOINT *CpuDriverEntryPoint,
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IN EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo
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);
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@ -0,0 +1,61 @@
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/** @file
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This file describes the PiMm Cpu Driver Entry Point Protocol.
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the protocol is for defining handler for mm communication request event
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according to cpu driver.
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Copyright (c) 2024, Arm Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef PI_MM_CPU_DRIVER_EP_H_
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#define PI_MM_CPU_DRIVER_EP_H_
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#include <PiMm.h>
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#define EDKII_PI_MM_CPU_DRIVER_EP_GUID { \
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0x6ecbd5a1, 0xc0f8, 0x4702, { 0x83, 0x01, 0x4f, 0xc2, 0xc5, 0x47, 0x0a, 0x51 } \
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}
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/**
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The PI Standalone MM entry point for handling mm communication request
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Here is an example of how the PI_MM_CPU_DRIVER_EP_PROTOCOL is utilized in ARM:
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1. StandaloneMmCoreEntryPoint loads StandaloneMmCore.
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2. StandaloneMmCore dispatches all MM drivers,
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including the StandaloneMmCpu driver.
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3. The StandaloneMmCpu driver declares its MMI CPU entry point through
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the PI_MM_CPU_DRIVER_EP_PROTOCOL.
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4. After all drivers have been dispatched,
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StandaloneMmCoreEntryPoint retrieves the MMI CPU entry point
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by locating the protocol.
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5. The DelegatedEventLoop then calls the MM CPU entry point.
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See StandaloneMmPkg/StandaloneMmCoreEntryPoint/Arm/StandaloneMmCoreEntryPoint.c
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@param [in] EventId The event Id based on firmware.
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@param [in] CpuNumber The CPU number.
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@param [in] CommBufferAddr Address of the communication buffer.
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@retval EFI_SUCCESS Success.
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@retval EFI_INVALID_PARAMETER A parameter was invalid.
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@retval EFI_ACCESS_DENIED Access not permitted.
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@retval EFI_OUT_OF_RESOURCES Out of resources.
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@retval EFI_UNSUPPORTED Operation not supported.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EDKII_PI_MM_CPU_DRIVER_ENTRYPOINT)(
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IN UINTN EventId,
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IN UINTN CpuNumber,
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IN UINTN CommBufferAddr
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);
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typedef struct _EDKII_PI_MM_CPU_DRIVER_EP_PROTOCOL EDKII_PI_MM_CPU_DRIVER_EP_PROTOCOL;
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struct _EDKII_PI_MM_CPU_DRIVER_EP_PROTOCOL {
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EDKII_PI_MM_CPU_DRIVER_ENTRYPOINT PiMmCpuDriverEntryPoint;
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};
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extern EFI_GUID gEdkiiPiMmCpuDriverEpProtocolGuid;
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#endif
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@ -13,20 +13,10 @@
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#include <Protocol/MmCommunication2.h>
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#include <Protocol/MmConfiguration.h>
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#include <Protocol/MmCpu.h>
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#include <Protocol/PiMmCpuDriverEp.h>
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#include <Guid/MpInformation.h>
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typedef
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EFI_STATUS
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(*PI_MM_CPU_DRIVER_ENTRYPOINT) (
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IN UINTN EventId,
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IN UINTN CpuNumber,
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IN UINTN NsCommBufferAddr
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);
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typedef struct {
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PI_MM_CPU_DRIVER_ENTRYPOINT *MmCpuDriverEpPtr;
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} MM_CPU_DRIVER_EP_DESCRIPTOR;
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//
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// CPU driver initialization specific declarations
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//
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@ -53,7 +53,6 @@ extern EFI_GUID gEfiMmCpuDriverEpDescriptorGuid;
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**/
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VOID *
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CreateHobListFromBootInfo (
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IN OUT PI_MM_CPU_DRIVER_ENTRYPOINT *CpuDriverEntryPoint,
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IN EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo
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)
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{
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@ -68,7 +67,6 @@ CreateHobListFromBootInfo (
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MP_INFORMATION_HOB_DATA *MpInformationHobData;
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EFI_PROCESSOR_INFORMATION *ProcInfoBuffer;
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EFI_SECURE_PARTITION_CPU_INFO *CpuInfo;
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MM_CPU_DRIVER_EP_DESCRIPTOR *CpuDriverEntryPointDesc;
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// Create a hoblist with a PHIT and EOH
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HobStart = HobConstructor (
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NsCommBufMmramRange->PhysicalSize = PayloadBootInfo->SpNsCommBufSize;
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NsCommBufMmramRange->RegionState = EFI_CACHEABLE | EFI_ALLOCATED;
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// Create a Guided HOB to enable the ARM TF CPU driver to share its entry
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// point and populate it with the address of the shared buffer
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CpuDriverEntryPointDesc = (MM_CPU_DRIVER_EP_DESCRIPTOR *)BuildGuidHob (
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&gEfiMmCpuDriverEpDescriptorGuid,
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sizeof (MM_CPU_DRIVER_EP_DESCRIPTOR)
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);
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*CpuDriverEntryPoint = NULL;
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CpuDriverEntryPointDesc->MmCpuDriverEpPtr = CpuDriverEntryPoint;
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// Find the size of the GUIDed HOB with SRAM ranges
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BufferSize = sizeof (EFI_MMRAM_HOB_DESCRIPTOR_BLOCK);
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BufferSize += PayloadBootInfo->NumSpMemRegions * sizeof (EFI_MMRAM_DESCRIPTOR);
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@ -38,21 +38,23 @@
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#include <IndustryStandard/ArmMmSvc.h>
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#include <IndustryStandard/ArmFfaSvc.h>
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#include <Protocol/PiMmCpuDriverEp.h>
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#define SPM_MAJOR_VER_MASK 0xFFFF0000
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#define SPM_MINOR_VER_MASK 0x0000FFFF
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#define SPM_MAJOR_VER_SHIFT 16
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#define FFA_NOT_SUPPORTED -1
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#define BOOT_PAYLOAD_VERSION 1
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extern EFI_MM_SYSTEM_TABLE gMmCoreMmst;
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STATIC CONST UINT32 mSpmMajorVer = SPM_MAJOR_VERSION;
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STATIC CONST UINT32 mSpmMinorVer = SPM_MINOR_VERSION;
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STATIC CONST UINT32 mSpmMajorVerFfa = SPM_MAJOR_VERSION_FFA;
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STATIC CONST UINT32 mSpmMinorVerFfa = SPM_MINOR_VERSION_FFA;
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#define BOOT_PAYLOAD_VERSION 1
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PI_MM_CPU_DRIVER_ENTRYPOINT CpuDriverEntryPoint = NULL;
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/**
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Retrieve a pointer to and print the boot information passed by privileged
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secure firmware.
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@ -216,13 +218,15 @@ SetEventCompleteSvcArgs (
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/**
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A loop to delegated events.
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@param [in] CpuDriverEntryPoint Entry point to handle request.
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@param [in] EventCompleteSvcArgs Pointer to the event completion arguments.
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**/
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VOID
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EFIAPI
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DelegatedEventLoop (
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IN ARM_SVC_ARGS *EventCompleteSvcArgs
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IN EDKII_PI_MM_CPU_DRIVER_ENTRYPOINT CpuDriverEntryPoint,
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IN ARM_SVC_ARGS *EventCompleteSvcArgs
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)
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{
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BOOLEAN FfaEnabled;
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@ -381,16 +385,20 @@ _ModuleEntryPoint (
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IN UINT64 cookie2
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)
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{
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PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;
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EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo;
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ARM_SVC_ARGS EventCompleteSvcArgs;
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EFI_STATUS Status;
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UINT32 SectionHeaderOffset;
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UINT16 NumberOfSections;
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VOID *HobStart;
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VOID *TeData;
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UINTN TeDataSize;
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EFI_PHYSICAL_ADDRESS ImageBase;
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PE_COFF_LOADER_IMAGE_CONTEXT ImageContext;
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EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo;
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ARM_SVC_ARGS EventCompleteSvcArgs;
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EFI_STATUS Status;
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UINT32 SectionHeaderOffset;
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UINT16 NumberOfSections;
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VOID *HobStart;
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VOID *TeData;
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UINTN TeDataSize;
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EFI_PHYSICAL_ADDRESS ImageBase;
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EDKII_PI_MM_CPU_DRIVER_EP_PROTOCOL *PiMmCpuDriverEpProtocol;
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EDKII_PI_MM_CPU_DRIVER_ENTRYPOINT CpuDriverEntryPoint;
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CpuDriverEntryPoint = NULL;
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// Get Secure Partition Manager Version Information
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Status = GetSpmVersion ();
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//
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// Create Hoblist based upon boot information passed by privileged software
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//
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HobStart = CreateHobListFromBootInfo (&CpuDriverEntryPoint, PayloadBootInfo);
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HobStart = CreateHobListFromBootInfo (PayloadBootInfo);
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//
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// Call the MM Core entry point
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//
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ProcessModuleEntryPointList (HobStart);
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DEBUG ((DEBUG_INFO, "Shared Cpu Driver EP %p\n", (VOID *)CpuDriverEntryPoint));
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//
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// Find out cpu driver entry point used in DelegatedEventLoop
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// to handle MMI request.
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//
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Status = gMmCoreMmst.MmLocateProtocol (
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&gEdkiiPiMmCpuDriverEpProtocolGuid,
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NULL,
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(VOID **)&PiMmCpuDriverEpProtocol
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);
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if (EFI_ERROR (Status)) {
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goto finish;
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}
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CpuDriverEntryPoint = PiMmCpuDriverEpProtocol->PiMmCpuDriverEntryPoint;
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DEBUG ((
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DEBUG_INFO,
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"Shared Cpu Driver EP %p\n",
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CpuDriverEntryPoint
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));
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finish:
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ZeroMem (&EventCompleteSvcArgs, sizeof (EventCompleteSvcArgs));
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Status,
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&EventCompleteSvcArgs
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);
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DelegatedEventLoop (&EventCompleteSvcArgs);
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DelegatedEventLoop (CpuDriverEntryPoint, t&EventCompleteSvcArgs);
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}
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@ -49,7 +49,9 @@
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gMpInformationHobGuid
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gEfiMmPeiMmramMemoryReserveGuid
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gEfiStandaloneMmNonSecureBufferGuid
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gEfiMmCpuDriverEpDescriptorGuid
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[Protocols.ARM, Protocols.AARCH64]
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gEdkiiPiMmCpuDriverEpProtocolGuid
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[FeaturePcd.ARM, FeaturePcd.AARCH64]
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gArmTokenSpaceGuid.PcdFfaEnable
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@ -47,13 +47,15 @@
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gEfiMmPeiMmramMemoryReserveGuid = { 0x0703f912, 0xbf8d, 0x4e2a, { 0xbe, 0x07, 0xab, 0x27, 0x25, 0x25, 0xc5, 0x92 }}
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gEfiStandaloneMmNonSecureBufferGuid = { 0xf00497e3, 0xbfa2, 0x41a1, { 0x9d, 0x29, 0x54, 0xc2, 0xe9, 0x37, 0x21, 0xc5 }}
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gEfiMmCpuDriverEpDescriptorGuid = { 0x6ecbd5a1, 0xc0f8, 0x4702, { 0x83, 0x01, 0x4f, 0xc2, 0xc5, 0x47, 0x0a, 0x51 }}
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gEventMmDispatchGuid = { 0x7e6efffa, 0x69b4, 0x4c1b, { 0xa4, 0xc7, 0xaf, 0xf9, 0xc9, 0x24, 0x4f, 0xee }}
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[Ppis]
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gMmCoreFvLocationPpiGuid = { 0x47a00618, 0x237a, 0x4386, { 0x8f, 0xc5, 0x2a, 0x86, 0xd8, 0xac, 0x41, 0x05 }}
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[Protocols]
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gEdkiiPiMmCpuDriverEpProtocolGuid = { 0x6ecbd5a1, 0xc0f8, 0x4702, { 0x83, 0x01, 0x4f, 0xc2, 0xc5, 0x47, 0x0a, 0x51 }}
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[PcdsFixedAtBuild, PcdsPatchableInModule]
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## Maximum permitted encapsulation levels of sections in a firmware volume,
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# in the MM phase. Minimum value is 1. Sections nested more deeply are rejected.
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