UefiCpuPkg: VTF0 Linear-Address Translation to a 1-GByte Page till 512GB

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3473

X64 Reset Vector Code can access the memory range till 4GB using the
Linear-Address Translation to a 2-MByte Page, when user wants to use
more than 4G using 2M Page it will leads to use more number of Page
table entries. using the 1-GByte Page table user can use more than
4G Memory by reducing the page table entries using 1-GByte Page,
this patch attached can access memory range till 512GByte via Linear-
Address Translation to a 1-GByte Page.

Build Tool: if the nasm is not found it will throw Build errors like
FileNotFoundError: [WinError 2]The system cannot find the file specified
run the command wil try except block to get meaningful error message

Test Result: Tested in both Simulation environment and Hardware
both works fine without any issues.

Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Debkumar De <debkumar.de@intel.com>
Cc: Harry Han <harry.han@intel.com>
Cc: Catharine West <catharine.west@intel.com>
Cc: Sangeetha V <sangeetha.v@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Sahil Dureja <sahil.dureja@intel.com>
Signed-off-by: Ashraf Ali S <ashraf.ali.s@intel.com>
This commit is contained in:
Ashraf Ali S 2021-09-11 16:55:51 +05:30 committed by mergify[bot]
parent 89f7ed8b29
commit 60d8bb9f28
21 changed files with 186 additions and 48 deletions

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@ -22,10 +22,10 @@
#
[Binaries.Ia32]
RAW|ResetVector.ia32.raw|*
RAW|IA32/ResetVector.ia32.raw|*
[Binaries.X64]
RAW|ResetVector.x64.raw|*
RAW|X64/PageTable2M/ResetVector.x64.raw|*
[UserExtensions.TianoCore."ExtraFiles"]
ResetVectorExtra.uni

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@ -0,0 +1,31 @@
## @file
# Reset Vector binary
#
# Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
[Defines]
INF_VERSION = 0x00010005
BASE_NAME = ResetVector
MODULE_UNI_FILE = ResetVector.uni
FILE_GUID = 1BA0062E-C779-4582-8566-336AE8F78F09
MODULE_TYPE = SEC
VERSION_STRING = 1.1
#
# The following information is for reference only and not required by the build tools.
#
# VALID_ARCHITECTURES = IA32 X64
#
[Binaries.Ia32]
RAW|IA32/ResetVector.ia32.raw|*
[Binaries.X64]
RAW|X64/PageTable1G/ResetVector.x64.raw|*
[UserExtensions.TianoCore."ExtraFiles"]
ResetVectorExtra.uni

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@ -6,45 +6,84 @@
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
import glob
import os
import subprocess
import sys
PAGE_TABLE_2M = 'PageTable2M'
PAGE_TABLE_1G = 'PageTable1G'
FILE_FORMAT = '.raw'
ALL_RAW_FORMAT = '*' + FILE_FORMAT
IA32 = 'IA32'
X64 = 'X64'
# Pre-Define a Macros for Page Table
PAGE_TABLES = {
PAGE_TABLE_2M : "PAGE_TABLE_2M",
PAGE_TABLE_1G : "PAGE_TABLE_1G"
}
def RunCommand(commandLine):
#print ' '.join(commandLine)
return subprocess.call(commandLine)
for filename in glob.glob(os.path.join('Bin', '*.raw')):
os.remove(filename)
# Check for all raw binaries and delete them
for root, dirs, files in os.walk('Bin'):
for file in files:
if file.endswith(FILE_FORMAT):
os.remove(os.path.join(root, file))
for arch in ('ia32', 'x64'):
for debugType in (None, 'port80', 'serial'):
output = os.path.join('Bin', 'ResetVector')
output += '.' + arch
if debugType is not None:
output += '.' + debugType
output += '.raw'
commandLine = (
'nasm',
'-D', 'ARCH_%s' % arch.upper(),
'-D', 'DEBUG_%s' % str(debugType).upper(),
'-o', output,
'Vtf0.nasmb',
)
print(f"Command : {' '.join(commandLine)}")
ret = RunCommand(commandLine)
if ret != 0:
print(f"something went wrong while executing {commandLine[-1]}")
sys.exit()
print('\tASM\t' + output)
for pageTable in PAGE_TABLES.keys():
ret = True
if arch.lower() == X64.lower():
directory = os.path.join('Bin', X64, pageTable)
else:
directory = os.path.join('Bin', IA32)
commandLine = (
'python',
'Tools/FixupForRawSection.py',
output,
)
print('\tFIXUP\t' + output)
ret = RunCommand(commandLine)
if ret != 0: sys.exit(ret)
# output raw binary name with arch type
fileName = 'ResetVector' + '.' + arch
if debugType is not None:
fileName += '.' + debugType
fileName += FILE_FORMAT
output = os.path.join(directory, fileName)
# if the directory not exists then create it
if not os.path.isdir(directory):
os.makedirs(directory)
# Prepare the command to execute the nasmb
commandLine = (
'nasm',
'-D', 'ARCH_%s' % arch.upper(),
'-D', 'DEBUG_%s' % str(debugType).upper(),
'-D', PAGE_TABLES[pageTable].upper(),
'-o', output,
'Vtf0.nasmb',
)
print(f"Command : {' '.join(commandLine)}")
try:
ret = RunCommand(commandLine)
except FileNotFoundError:
print("NASM not found")
except:
pass
if ret != 0:
print(f"something went wrong while executing {commandLine[-1]}")
sys.exit()
print('\tASM\t' + output)
commandLine = (
'python',
'Tools/FixupForRawSection.py',
output,
)
print('\tFIXUP\t' + output)
ret = RunCommand(commandLine)
if ret != 0: sys.exit(ret)

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@ -0,0 +1,20 @@
;------------------------------------------------------------------------------
; @file
; Definitions of Page Table Entry for the reset vector module
;
; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
;------------------------------------------------------------------------------
%define PAGE_PRESENT 0x01
%define PAGE_READ_WRITE 0x02
%define PAGE_USER_SUPERVISOR 0x04
%define PAGE_WRITE_THROUGH 0x08
%define PAGE_CACHE_DISABLE 0x010
%define PAGE_ACCESSED 0x020
%define PAGE_DIRTY 0x040
%define PAGE_SIZE 0x080
%define PAGE_GLOBAL 0x0100
%define PAGE_2M_PAT 0x01000

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@ -29,7 +29,7 @@ EBP/RBP - Pointer to the start of the Boot Firmware Volume
=== HOW TO BUILD VTF0 ===
Dependencies:
* Python 2.5~2.7
* Python 3 or newer
* Nasm 2.03 or newer
To rebuild the VTF0 binaries:

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@ -35,8 +35,14 @@
%include "PostCodes.inc"
%include "PageTables.inc"
%ifdef ARCH_X64
%include "X64/PageTables.asm"
%ifdef PAGE_TABLE_1G
%include "X64/PageTables1G.asm"
%else
%include "X64/PageTables2M.asm"
%endif
%endif
%ifdef DEBUG_PORT80

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@ -0,0 +1,53 @@
;------------------------------------------------------------------------------
; @file
; Emits Page Tables for 1:1 mapping of the addresses 0 - 0x8000000000 (512GB)
;
; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
; Linear-Address Translation to a 1-GByte Page
;
;------------------------------------------------------------------------------
BITS 64
%define ALIGN_TOP_TO_4K_FOR_PAGING
%define PAGE_PDP_ATTR (PAGE_ACCESSED + \
PAGE_READ_WRITE + \
PAGE_PRESENT)
%define PAGE_PDP_1G_ATTR (PAGE_ACCESSED + \
PAGE_READ_WRITE + \
PAGE_DIRTY + \
PAGE_PRESENT + \
PAGE_SIZE)
%define PGTBLS_OFFSET(x) ((x) - TopLevelPageDirectory)
%define PGTBLS_ADDR(x) (ADDR_OF(TopLevelPageDirectory) + (x))
%define PDP(offset) (ADDR_OF(TopLevelPageDirectory) + (offset) + \
PAGE_PDP_ATTR)
%define PDP_1G(x) ((x << 30) + PAGE_PDP_1G_ATTR)
ALIGN 16
TopLevelPageDirectory:
;
; Top level Page Directory Pointers (1 * 512GB entry)
;
DQ PDP(0x1000)
TIMES 0x1000-PGTBLS_OFFSET($) DB 0
;
; Next level Page Directory Pointers (512 * 1GB entries => 512GB)
;
%assign i 0
%rep 512
DQ PDP_1G(i)
%assign i i+1
%endrep
TIMES 0x2000-PGTBLS_OFFSET($) DB 0
EndOfPageTables:

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@ -11,19 +11,7 @@ BITS 64
%define ALIGN_TOP_TO_4K_FOR_PAGING
%define PAGE_PRESENT 0x01
%define PAGE_READ_WRITE 0x02
%define PAGE_USER_SUPERVISOR 0x04
%define PAGE_WRITE_THROUGH 0x08
%define PAGE_CACHE_DISABLE 0x010
%define PAGE_ACCESSED 0x020
%define PAGE_DIRTY 0x040
%define PAGE_PAT 0x080
%define PAGE_GLOBAL 0x0100
%define PAGE_2M_MBO 0x080
%define PAGE_2M_PAT 0x01000
%define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
%define PAGE_2M_PDE_ATTR (PAGE_SIZE + \
PAGE_ACCESSED + \
PAGE_DIRTY + \
PAGE_READ_WRITE + \

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@ -48,7 +48,8 @@
"DscPath": "UefiCpuPkg.dsc",
"IgnoreInf": [
"UefiCpuPkg/ResetVector/FixupVtf/Vtf.inf",
"UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf"
"UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf",
"UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf"
]
},
"HostUnitTestDscCompleteCheck": {