mirror of https://github.com/acidanthera/audk.git
SecurityPkg:Tcg: Fix comment typos
"Triggle" is a typo. Replace it with "Trigger" Cc: Long Qin <qin.long@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chao Zhang <chao.b.zhang@intel.com> Reviewed-by: Long Qin <qin.long@intel.com>
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@ -259,12 +259,12 @@ DefinitionBlock (
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If (LNot (And (MORD, 0x10)))
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{
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//
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// Triggle the SMI through ACPI _PTS method.
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// Trigger the SMI through ACPI _PTS method.
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//
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Store (0x02, MCIP)
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//
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// Triggle the SMI interrupt
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// Trigger the SMI interrupt
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//
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Store (MCIN, IOB2)
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}
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@ -365,7 +365,7 @@ DefinitionBlock (
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Store (0x02, PPIP)
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//
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// Triggle the SMI interrupt
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// Trigger the SMI interrupt
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//
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Store (PPIN, IOB2)
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Return (FRET)
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@ -396,7 +396,7 @@ DefinitionBlock (
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Store (0x05, PPIP)
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//
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// Triggle the SMI interrupt
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// Trigger the SMI interrupt
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//
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Store (PPIN, IOB2)
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@ -428,7 +428,7 @@ DefinitionBlock (
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}
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//
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// Triggle the SMI interrupt
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// Trigger the SMI interrupt
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//
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Store (PPIN, IOB2)
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Return (FRET)
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@ -442,7 +442,7 @@ DefinitionBlock (
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Store (DerefOf (Index (Arg2, 0x00)), UCRQ)
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//
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// Triggle the SMI interrupt
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// Trigger the SMI interrupt
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//
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Store (PPIN, IOB2)
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@ -476,12 +476,12 @@ DefinitionBlock (
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Store (DerefOf (Index (Arg2, 0x00)), MORD)
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//
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// Triggle the SMI through ACPI _DSM method.
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// Trigger the SMI through ACPI _DSM method.
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//
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Store (0x01, MCIP)
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//
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// Triggle the SMI interrupt
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// Trigger the SMI interrupt
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//
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Store (MCIN, IOB2)
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Return (MRET)
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@ -95,12 +95,12 @@ DefinitionBlock (
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If (LNot (And (MORD, 0x10)))
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{
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//
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// Triggle the SMI through ACPI _PTS method.
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// Trigger the SMI through ACPI _PTS method.
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//
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Store (0x02, MCIP)
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//
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// Triggle the SMI interrupt
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// Trigger the SMI interrupt
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//
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Store (MCIN, IOB2)
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}
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@ -200,7 +200,7 @@ DefinitionBlock (
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Store (0x02, PPIP)
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//
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// Triggle the SMI interrupt
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// Trigger the SMI interrupt
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//
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Store (PPIN, IOB2)
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Return (FRET)
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@ -231,7 +231,7 @@ DefinitionBlock (
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Store (0x05, PPIP)
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//
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// Triggle the SMI interrupt
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// Trigger the SMI interrupt
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//
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Store (PPIN, IOB2)
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@ -259,7 +259,7 @@ DefinitionBlock (
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Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
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//
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// Triggle the SMI interrupt
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// Trigger the SMI interrupt
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//
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Store (PPIN, IOB2)
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Return (FRET)
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@ -273,7 +273,7 @@ DefinitionBlock (
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Store (DerefOf (Index (Arg2, 0x00)), UCRQ)
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//
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// Triggle the SMI interrupt
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// Trigger the SMI interrupt
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//
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Store (PPIN, IOB2)
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@ -307,12 +307,12 @@ DefinitionBlock (
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Store (DerefOf (Index (Arg2, 0x00)), MORD)
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//
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// Triggle the SMI through ACPI _DSM method.
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// Trigger the SMI through ACPI _DSM method.
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//
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Store (0x01, MCIP)
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//
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// Triggle the SMI interrupt
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// Trigger the SMI interrupt
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//
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Store (MCIN, IOB2)
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Return (MRET)
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