mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg: Update code to support enable ProcTrace only on BSP
Update code to support enable ProcTrace only on BSP. Add a new dynamic PCD to indicate if enable ProcTrace only on BSP. In ProcTrace.c code, if this new PCD is true, only allocate buffer and set CtrlReg.Bits.TraceEn to 1 for BSP. Bugzila: https://bugzilla.tianocore.org/show_bug.cgi?id=4423 Signed-off-by: Dun Tan <dun.tan@intel.com> Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Xiao X Chen <xiao.x.chen@intel.com>
This commit is contained in:
Dun Tan
mergify[bot]
parent
5a349b96b1
commit
61e2c83424
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@ -4,7 +4,7 @@
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# This library registers CPU features defined in Intel(R) 64 and IA-32
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# Architectures Software Developer's Manual.
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#
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# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2017 - 2023, Intel Corporation. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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@ -62,3 +62,4 @@
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gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset ## SOMETIMES_CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme ## SOMETIMES_CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize ## SOMETIMES_CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly ## SOMETIMES_CONSUMES
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@ -1,7 +1,7 @@
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/** @file
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Intel Processor Trace feature.
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Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017 - 2023, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -46,6 +46,8 @@ typedef struct {
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UINTN *TopaMemArray;
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BOOLEAN EnableOnBspOnly;
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PROC_TRACE_PROCESSOR_DATA *ProcessorData;
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} PROC_TRACE_DATA;
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@ -77,6 +79,7 @@ ProcTraceGetConfigData (
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ConfigData->NumberOfProcessors = (UINT32)NumberOfProcessors;
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ConfigData->ProcTraceMemSize = PcdGet32 (PcdCpuProcTraceMemSize);
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ConfigData->ProcTraceOutputScheme = PcdGet8 (PcdCpuProcTraceOutputScheme);
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ConfigData->EnableOnBspOnly = PcdGetBool (PcdCpuProcTraceBspOnly);
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return ConfigData;
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}
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@ -188,6 +191,7 @@ ProcTraceInitialize (
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MSR_IA32_RTIT_OUTPUT_BASE_REGISTER OutputBaseReg;
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MSR_IA32_RTIT_OUTPUT_MASK_PTRS_REGISTER OutputMaskPtrsReg;
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RTIT_TOPA_TABLE_ENTRY *TopaEntryPtr;
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BOOLEAN IsBsp;
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//
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// The scope of the MSR_IA32_RTIT_* is core for below processor type, only program
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@ -236,6 +240,12 @@ ProcTraceInitialize (
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return RETURN_SUCCESS;
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}
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IsBsp = (CpuInfo->ProcessorInfo.StatusFlag & PROCESSOR_AS_BSP_BIT) ? TRUE : FALSE;
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if (ProcTraceData->EnableOnBspOnly && !IsBsp) {
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return RETURN_SUCCESS;
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}
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MemRegionBaseAddr = 0;
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FirstIn = FALSE;
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@ -260,43 +270,62 @@ ProcTraceInitialize (
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// address base in MSR, IA32_RTIT_OUTPUT_BASE (560h) bits 47:12. Note that all regions must be
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// aligned based on their size, not just 4K. Thus a 2M region must have bits 20:12 cleared.
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//
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ThreadMemRegionTable = (UINTN *)AllocatePool (ProcTraceData->NumberOfProcessors * sizeof (UINTN *));
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if (ThreadMemRegionTable == NULL) {
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DEBUG ((DEBUG_ERROR, "Allocate ProcTrace ThreadMemRegionTable Failed\n"));
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return RETURN_OUT_OF_RESOURCES;
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}
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ProcTraceData->ThreadMemRegionTable = ThreadMemRegionTable;
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for (Index = 0; Index < ProcTraceData->NumberOfProcessors; Index++, ProcTraceData->AllocatedThreads++) {
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Pages = EFI_SIZE_TO_PAGES (MemRegionSize);
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Alignment = MemRegionSize;
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AlignedAddress = (UINTN)AllocateAlignedReservedPages (Pages, Alignment);
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if (AlignedAddress == 0) {
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DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated only for %d threads\n", ProcTraceData->AllocatedThreads));
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if (Index == 0) {
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//
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// Could not allocate for BSP even
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//
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FreePool ((VOID *)ThreadMemRegionTable);
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ThreadMemRegionTable = NULL;
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return RETURN_OUT_OF_RESOURCES;
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}
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break;
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Pages = EFI_SIZE_TO_PAGES (MemRegionSize);
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Alignment = MemRegionSize;
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if (ProcTraceData->EnableOnBspOnly) {
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//
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// When only enable ProcTrace on BSP, this is the first and only time ProcTraceInitialize() runs.
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//
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MemRegionBaseAddr = (UINTN)AllocateAlignedReservedPages (Pages, Alignment);
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if (MemRegionBaseAddr == 0) {
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//
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// Could not allocate for BSP even
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//
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DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, failed to allocate buffer for BSP\n"));
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return RETURN_OUT_OF_RESOURCES;
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}
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ThreadMemRegionTable[Index] = AlignedAddress;
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DEBUG ((DEBUG_INFO, "ProcTrace: PT MemRegionBaseAddr(aligned) for thread %d: 0x%llX \n", Index, (UINT64)ThreadMemRegionTable[Index]));
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}
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DEBUG ((DEBUG_INFO, "ProcTrace: Allocated PT MemRegionBaseAddr(aligned) for BSP only: 0x%llX.\n", (UINT64)MemRegionBaseAddr));
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} else {
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ThreadMemRegionTable = (UINTN *)AllocatePool (ProcTraceData->NumberOfProcessors * sizeof (UINTN *));
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if (ThreadMemRegionTable == NULL) {
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DEBUG ((DEBUG_ERROR, "Allocate ProcTrace ThreadMemRegionTable Failed\n"));
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return RETURN_OUT_OF_RESOURCES;
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}
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DEBUG ((DEBUG_INFO, "ProcTrace: Allocated PT mem for %d thread \n", ProcTraceData->AllocatedThreads));
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ProcTraceData->ThreadMemRegionTable = ThreadMemRegionTable;
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for (Index = 0; Index < ProcTraceData->NumberOfProcessors; Index++, ProcTraceData->AllocatedThreads++) {
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AlignedAddress = (UINTN)AllocateAlignedReservedPages (Pages, Alignment);
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if (AlignedAddress == 0) {
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DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated only for %d threads\n", ProcTraceData->AllocatedThreads));
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if (Index == 0) {
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//
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// Could not allocate for BSP even
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//
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FreePool ((VOID *)ThreadMemRegionTable);
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ThreadMemRegionTable = NULL;
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return RETURN_OUT_OF_RESOURCES;
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}
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break;
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}
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ThreadMemRegionTable[Index] = AlignedAddress;
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DEBUG ((DEBUG_INFO, "ProcTrace: PT MemRegionBaseAddr(aligned) for thread %d: 0x%llX \n", Index, (UINT64)ThreadMemRegionTable[Index]));
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}
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DEBUG ((DEBUG_INFO, "ProcTrace: Allocated PT mem for %d thread \n", ProcTraceData->AllocatedThreads));
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}
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}
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if (ProcessorNumber < ProcTraceData->AllocatedThreads) {
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MemRegionBaseAddr = ProcTraceData->ThreadMemRegionTable[ProcessorNumber];
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} else {
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return RETURN_SUCCESS;
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if (!ProcTraceData->EnableOnBspOnly) {
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if (ProcessorNumber < ProcTraceData->AllocatedThreads) {
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MemRegionBaseAddr = ProcTraceData->ThreadMemRegionTable[ProcessorNumber];
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} else {
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return RETURN_SUCCESS;
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}
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}
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///
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@ -367,50 +396,67 @@ ProcTraceInitialize (
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//
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if (FirstIn) {
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DEBUG ((DEBUG_INFO, "ProcTrace: Enabling ToPA scheme \n"));
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//
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// Let BSP allocate ToPA table mem for all threads
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//
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TopaMemArray = (UINTN *)AllocatePool (ProcTraceData->AllocatedThreads * sizeof (UINTN *));
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if (TopaMemArray == NULL) {
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DEBUG ((DEBUG_ERROR, "ProcTrace: Allocate mem for ToPA Failed\n"));
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return RETURN_OUT_OF_RESOURCES;
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}
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ProcTraceData->TopaMemArray = TopaMemArray;
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Pages = EFI_SIZE_TO_PAGES (sizeof (PROC_TRACE_TOPA_TABLE));
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Alignment = 0x1000;
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for (Index = 0; Index < ProcTraceData->AllocatedThreads; Index++) {
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Pages = EFI_SIZE_TO_PAGES (sizeof (PROC_TRACE_TOPA_TABLE));
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Alignment = 0x1000;
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AlignedAddress = (UINTN)AllocateAlignedReservedPages (Pages, Alignment);
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if (AlignedAddress == 0) {
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if (Index < ProcTraceData->AllocatedThreads) {
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ProcTraceData->AllocatedThreads = Index;
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}
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DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated ToPA mem only for %d threads\n", ProcTraceData->AllocatedThreads));
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if (Index == 0) {
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//
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// Could not allocate for BSP even
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//
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FreePool ((VOID *)TopaMemArray);
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TopaMemArray = NULL;
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return RETURN_OUT_OF_RESOURCES;
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}
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break;
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if (ProcTraceData->EnableOnBspOnly) {
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//
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// When only enable ProcTrace on BSP, this is the first and only time ProcTraceInitialize() runs.
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//
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TopaTableBaseAddr = (UINTN)AllocateAlignedReservedPages (Pages, Alignment);
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if (TopaTableBaseAddr == 0) {
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DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, failed to allocate ToPA mem for BSP"));
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return RETURN_OUT_OF_RESOURCES;
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}
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TopaMemArray[Index] = AlignedAddress;
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DEBUG ((DEBUG_INFO, "ProcTrace: Topa table address(aligned) for thread %d is 0x%llX \n", Index, (UINT64)TopaMemArray[Index]));
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}
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DEBUG ((DEBUG_INFO, "ProcTrace: Topa table address(aligned) for BSP only: 0x%llX \n", (UINT64)TopaTableBaseAddr));
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} else {
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//
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// Let BSP allocate ToPA table mem for all threads
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//
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TopaMemArray = (UINTN *)AllocatePool (ProcTraceData->AllocatedThreads * sizeof (UINTN *));
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if (TopaMemArray == NULL) {
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DEBUG ((DEBUG_ERROR, "ProcTrace: Allocate mem for ToPA Failed\n"));
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return RETURN_OUT_OF_RESOURCES;
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}
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DEBUG ((DEBUG_INFO, "ProcTrace: Allocated ToPA mem for %d thread \n", ProcTraceData->AllocatedThreads));
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ProcTraceData->TopaMemArray = TopaMemArray;
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for (Index = 0; Index < ProcTraceData->AllocatedThreads; Index++) {
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AlignedAddress = (UINTN)AllocateAlignedReservedPages (Pages, Alignment);
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if (AlignedAddress == 0) {
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if (Index < ProcTraceData->AllocatedThreads) {
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ProcTraceData->AllocatedThreads = Index;
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}
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DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated ToPA mem only for %d threads\n", ProcTraceData->AllocatedThreads));
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if (Index == 0) {
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//
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// Could not allocate for BSP even
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//
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FreePool ((VOID *)TopaMemArray);
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TopaMemArray = NULL;
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return RETURN_OUT_OF_RESOURCES;
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}
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break;
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}
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TopaMemArray[Index] = AlignedAddress;
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DEBUG ((DEBUG_INFO, "ProcTrace: Topa table address(aligned) for thread %d is 0x%llX \n", Index, (UINT64)TopaMemArray[Index]));
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}
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DEBUG ((DEBUG_INFO, "ProcTrace: Allocated ToPA mem for %d thread \n", ProcTraceData->AllocatedThreads));
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}
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}
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if (ProcessorNumber < ProcTraceData->AllocatedThreads) {
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TopaTableBaseAddr = ProcTraceData->TopaMemArray[ProcessorNumber];
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} else {
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return RETURN_SUCCESS;
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if (!ProcTraceData->EnableOnBspOnly) {
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if (ProcessorNumber < ProcTraceData->AllocatedThreads) {
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TopaTableBaseAddr = ProcTraceData->TopaMemArray[ProcessorNumber];
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} else {
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return RETURN_SUCCESS;
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}
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}
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TopaTable = (PROC_TRACE_TOPA_TABLE *)TopaTableBaseAddr;
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@ -338,6 +338,13 @@
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# @Prompt Current boot is a power-on reset.
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gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset|FALSE|BOOLEAN|0x0000001B
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## This PCD indicates whether CPU processor trace is enabled on BSP only when CPU processor trace is enabled.<BR><BR>
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# This PCD is ignored if CPU processor trace is disabled.<BR><BR>
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# TRUE - CPU processor trace is enabled on BSP only.<BR>
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# FASLE - CPU processor trace is enabled on all CPU.<BR>
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# @Prompt Enable CPU processor trace only on BSP.
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gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly|FALSE|BOOLEAN|0x60000019
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[PcdsFixedAtBuild.X64, PcdsPatchableInModule.X64, PcdsDynamic.X64, PcdsDynamicEx.X64]
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## Indicate access to non-SMRAM memory is restricted to reserved, runtime and ACPI NVS type after SmmReadyToLock.
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# MMIO access is always allowed regardless of the value of this PCD.
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