Skip restoration of DRx registers to support in-circuit emualators or debuggers set breakpoint in interrupt/exception context.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10573 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
rsun3 2010-06-11 03:22:15 +00:00
parent 35a1715411
commit 61ece967cb
4 changed files with 16 additions and 84 deletions

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@ -1,6 +1,6 @@
#------------------------------------------------------------------------------
#*
#* Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
#* Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
#* This program and the accompanying materials
#* are licensed and made available under the terms and conditions of the BSD License
#* which accompanies this distribution. The full text of the license may be found at
@ -258,16 +258,8 @@ ErrorCodeAndVectorOnStack:
#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
movl %dr7, %eax
pushl %eax
#; clear Dr7 while executing debugger itself
xorl %eax, %eax
movl %eax, %dr7
movl %dr6, %eax
pushl %eax
#; insure all status bits in dr6 are clear...
xorl %eax, %eax
movl %eax, %dr6
movl %dr3, %eax
pushl %eax
movl %dr2, %eax
@ -319,18 +311,9 @@ nullExternalExceptionHandler:
addl $512, %esp
#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
popl %eax
movl %eax, %dr0
popl %eax
movl %eax, %dr1
popl %eax
movl %eax, %dr2
popl %eax
movl %eax, %dr3
#; skip restore of dr6. We cleared dr6 during the context save.
addl $4, %esp
popl %eax
movl %eax, %dr7
#; Skip restoration of DRx registers to support in-circuit emualators
#; or debuggers set breakpoint in interrupt/exception context
addl $24, %esp
#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
popl %eax

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@ -1,7 +1,7 @@
TITLE CpuAsm.asm:
;------------------------------------------------------------------------------
;*
;* Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
;* Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
;* This program and the accompanying materials
;* are licensed and made available under the terms and conditions of the BSD License
;* which accompanies this distribution. The full text of the license may be found at
@ -256,16 +256,8 @@ ErrorCodeAndVectorOnStack:
;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
mov eax, dr7
push eax
;; clear Dr7 while executing debugger itself
xor eax, eax
mov dr7, eax
mov eax, dr6
push eax
;; insure all status bits in dr6 are clear...
xor eax, eax
mov dr6, eax
mov eax, dr3
push eax
mov eax, dr2
@ -317,18 +309,9 @@ nullExternalExceptionHandler:
add esp, 512
;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
pop eax
mov dr0, eax
pop eax
mov dr1, eax
pop eax
mov dr2, eax
pop eax
mov dr3, eax
;; skip restore of dr6. We cleared dr6 during the context save.
add esp, 4
pop eax
mov dr7, eax
;; Skip restoration of DRx registers to support in-circuit emualators
;; or debuggers set breakpoint in interrupt/exception context
add esp, 4 * 6
;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
pop eax

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@ -2,7 +2,7 @@
#------------------------------------------------------------------------------
#*
#* Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>
#* Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
#* This program and the accompanying materials
#* are licensed and made available under the terms and conditions of the BSD License
#* which accompanies this distribution. The full text of the license may be found at
@ -218,16 +218,8 @@ CommonInterruptEntry_al_0000:
#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
movq %dr7, %rax
pushq %rax
#; clear Dr7 while executing debugger itself
xorq %rax, %rax
movq %rax, %dr7
movq %dr6, %rax
pushq %rax
#; insure all status bits in dr6 are clear...
xorq %rax, %rax
movq %rax, %dr6
movq %dr3, %rax
pushq %rax
movq %dr2, %rax
@ -277,18 +269,9 @@ nonNullValue:
addq $512, %rsp
#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
popq %rax
movq %rax, %dr0
popq %rax
movq %rax, %dr1
popq %rax
movq %rax, %dr2
popq %rax
movq %rax, %dr3
#; skip restore of dr6. We cleared dr6 during the context save.
addq $8, %rsp
popq %rax
movq %rax, %dr7
#; Skip restoration of DRx registers to support in-circuit emualators
#; or debuggers set breakpoint in interrupt/exception context
addq $48, %rsp
#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
popq %rax

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@ -1,7 +1,7 @@
TITLE CpuAsm.asm:
;------------------------------------------------------------------------------
;*
;* Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>
;* Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
;* This program and the accompanying materials
;* are licensed and made available under the terms and conditions of the BSD License
;* which accompanies this distribution. The full text of the license may be found at
@ -207,16 +207,8 @@ NoErrorCode:
;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
mov rax, dr7
push rax
;; clear Dr7 while executing debugger itself
xor rax, rax
mov dr7, rax
mov rax, dr6
push rax
;; insure all status bits in dr6 are clear...
xor rax, rax
mov dr6, rax
mov rax, dr3
push rax
mov rax, dr2
@ -265,18 +257,9 @@ nonNullValue:
add rsp, 512
;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
pop rax
mov dr0, rax
pop rax
mov dr1, rax
pop rax
mov dr2, rax
pop rax
mov dr3, rax
;; skip restore of dr6. We cleared dr6 during the context save.
add rsp, 8
pop rax
mov dr7, rax
;; Skip restoration of DRx registers to support in-circuit emualators
;; or debuggers set breakpoint in interrupt/exception context
add rsp, 8 * 6
;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
pop rax