mirror of https://github.com/acidanthera/audk.git
Skip restoration of DRx registers to support in-circuit emualators or debuggers set breakpoint in interrupt/exception context.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10573 6f19259b-4bc3-4df7-8a09-765794883524
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@ -1,6 +1,6 @@
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#------------------------------------------------------------------------------
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#*
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#* Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
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#* Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
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#* This program and the accompanying materials
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#* are licensed and made available under the terms and conditions of the BSD License
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#* which accompanies this distribution. The full text of the license may be found at
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@ -258,16 +258,8 @@ ErrorCodeAndVectorOnStack:
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#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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movl %dr7, %eax
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pushl %eax
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#; clear Dr7 while executing debugger itself
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xorl %eax, %eax
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movl %eax, %dr7
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movl %dr6, %eax
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pushl %eax
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#; insure all status bits in dr6 are clear...
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xorl %eax, %eax
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movl %eax, %dr6
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movl %dr3, %eax
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pushl %eax
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movl %dr2, %eax
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@ -319,18 +311,9 @@ nullExternalExceptionHandler:
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addl $512, %esp
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#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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popl %eax
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movl %eax, %dr0
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popl %eax
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movl %eax, %dr1
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popl %eax
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movl %eax, %dr2
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popl %eax
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movl %eax, %dr3
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#; skip restore of dr6. We cleared dr6 during the context save.
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addl $4, %esp
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popl %eax
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movl %eax, %dr7
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#; Skip restoration of DRx registers to support in-circuit emualators
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#; or debuggers set breakpoint in interrupt/exception context
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addl $24, %esp
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#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
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popl %eax
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@ -1,7 +1,7 @@
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TITLE CpuAsm.asm:
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;------------------------------------------------------------------------------
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;*
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;* Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
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;* Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
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;* This program and the accompanying materials
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;* are licensed and made available under the terms and conditions of the BSD License
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;* which accompanies this distribution. The full text of the license may be found at
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@ -256,16 +256,8 @@ ErrorCodeAndVectorOnStack:
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;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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mov eax, dr7
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push eax
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;; clear Dr7 while executing debugger itself
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xor eax, eax
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mov dr7, eax
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mov eax, dr6
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push eax
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;; insure all status bits in dr6 are clear...
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xor eax, eax
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mov dr6, eax
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mov eax, dr3
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push eax
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mov eax, dr2
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@ -317,18 +309,9 @@ nullExternalExceptionHandler:
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add esp, 512
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;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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pop eax
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mov dr0, eax
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pop eax
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mov dr1, eax
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pop eax
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mov dr2, eax
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pop eax
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mov dr3, eax
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;; skip restore of dr6. We cleared dr6 during the context save.
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add esp, 4
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pop eax
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mov dr7, eax
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;; Skip restoration of DRx registers to support in-circuit emualators
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;; or debuggers set breakpoint in interrupt/exception context
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add esp, 4 * 6
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;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
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pop eax
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@ -2,7 +2,7 @@
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#------------------------------------------------------------------------------
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#*
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#* Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>
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#* Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
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#* This program and the accompanying materials
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#* are licensed and made available under the terms and conditions of the BSD License
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#* which accompanies this distribution. The full text of the license may be found at
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@ -218,16 +218,8 @@ CommonInterruptEntry_al_0000:
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#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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movq %dr7, %rax
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pushq %rax
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#; clear Dr7 while executing debugger itself
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xorq %rax, %rax
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movq %rax, %dr7
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movq %dr6, %rax
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pushq %rax
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#; insure all status bits in dr6 are clear...
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xorq %rax, %rax
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movq %rax, %dr6
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movq %dr3, %rax
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pushq %rax
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movq %dr2, %rax
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@ -277,18 +269,9 @@ nonNullValue:
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addq $512, %rsp
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#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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popq %rax
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movq %rax, %dr0
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popq %rax
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movq %rax, %dr1
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popq %rax
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movq %rax, %dr2
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popq %rax
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movq %rax, %dr3
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#; skip restore of dr6. We cleared dr6 during the context save.
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addq $8, %rsp
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popq %rax
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movq %rax, %dr7
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#; Skip restoration of DRx registers to support in-circuit emualators
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#; or debuggers set breakpoint in interrupt/exception context
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addq $48, %rsp
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#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
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popq %rax
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@ -1,7 +1,7 @@
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TITLE CpuAsm.asm:
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;------------------------------------------------------------------------------
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;*
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;* Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>
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;* Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
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;* This program and the accompanying materials
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;* are licensed and made available under the terms and conditions of the BSD License
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;* which accompanies this distribution. The full text of the license may be found at
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@ -207,16 +207,8 @@ NoErrorCode:
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;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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mov rax, dr7
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push rax
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;; clear Dr7 while executing debugger itself
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xor rax, rax
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mov dr7, rax
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mov rax, dr6
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push rax
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;; insure all status bits in dr6 are clear...
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xor rax, rax
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mov dr6, rax
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mov rax, dr3
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push rax
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mov rax, dr2
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@ -265,18 +257,9 @@ nonNullValue:
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add rsp, 512
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;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
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pop rax
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mov dr0, rax
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pop rax
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mov dr1, rax
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pop rax
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mov dr2, rax
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pop rax
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mov dr3, rax
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;; skip restore of dr6. We cleared dr6 during the context save.
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add rsp, 8
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pop rax
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mov dr7, rax
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;; Skip restoration of DRx registers to support in-circuit emualators
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;; or debuggers set breakpoint in interrupt/exception context
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add rsp, 8 * 6
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;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
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pop rax
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