From 62cd7d338b389aa21c00f0fc35f14a6fa9ba23b0 Mon Sep 17 00:00:00 2001 From: Ard Biesheuvel Date: Thu, 30 Jan 2025 17:24:22 +0100 Subject: [PATCH] ArmPkg: Retire ArmDisassemblerLib No longer used anywhere so can be retired. Signed-off-by: Ard Biesheuvel --- ArmPkg/ArmPkg.dec | 4 - ArmPkg/ArmPkg.dsc | 1 - ArmPkg/Include/Library/ArmDisassemblerLib.h | 37 - .../ArmDisassemblerLib/Aarch64Disassembler.c | 42 - .../ArmDisassemblerLib/ArmDisassembler.c | 465 ------- .../ArmDisassemblerLib/ArmDisassemblerLib.inf | 35 - .../ArmDisassemblerLib/ThumbDisassembler.c | 1073 ----------------- 7 files changed, 1657 deletions(-) delete mode 100644 ArmPkg/Include/Library/ArmDisassemblerLib.h delete mode 100644 ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c delete mode 100644 ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c delete mode 100644 ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf delete mode 100644 ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec index 79d7cc2ff7..78437b366d 100644 --- a/ArmPkg/ArmPkg.dec +++ b/ArmPkg/ArmPkg.dec @@ -28,10 +28,6 @@ Include # Root include for the package [LibraryClasses.common] - ## @libraryclass Convert Arm instructions to a human readable format. - # - ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h - ## @libraryclass Provides an interface to Arm generic counters. # ArmGenericTimerCounterLib|Include/Library/ArmGenericTimerCounterLib.h diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc index 7e8def29ca..90906796aa 100644 --- a/ArmPkg/ArmPkg.dsc +++ b/ArmPkg/ArmPkg.dsc @@ -110,7 +110,6 @@ [Components.common] ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf - ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf diff --git a/ArmPkg/Include/Library/ArmDisassemblerLib.h b/ArmPkg/Include/Library/ArmDisassemblerLib.h deleted file mode 100644 index f065ded5f3..0000000000 --- a/ArmPkg/Include/Library/ArmDisassemblerLib.h +++ /dev/null @@ -1,37 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#ifndef ARM_DISASSEMBLER_LIB_H_ -#define ARM_DISASSEMBLER_LIB_H_ - -/** - Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to - point to next instruction. - - We cheat and only decode instructions that access - memory. If the instruction is not found we dump the instruction in hex. - - @param OpCodePtrPtr Pointer to pointer of ARM Thumb instruction to disassemble. - @param Thumb TRUE for Thumb(2), FALSE for ARM instruction stream - @param Extended TRUE dump hex for instruction too. - @param ItBlock Size of IT Block - @param Buf Buffer to sprintf disassembly into. - @param Size Size of Buf in bytes. - -**/ -VOID -DisassembleInstruction ( - IN UINT8 **OpCodePtr, - IN BOOLEAN Thumb, - IN BOOLEAN Extended, - IN OUT UINT32 *ItBlock, - OUT CHAR8 *Buf, - OUT UINTN Size - ); - -#endif // ARM_DISASSEMBLER_LIB_H_ diff --git a/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c b/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c deleted file mode 100644 index ac334f0ebf..0000000000 --- a/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c +++ /dev/null @@ -1,42 +0,0 @@ -/** @file - Default exception handler - - Copyright (c) 2014, ARM Limited. All rights reserved. - - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include -#include -#include -#include - -/** - Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to - point to next instruction. - - @param OpCodePtrPtr Pointer to pointer of instruction to disassemble. - @param Thumb TRUE for Thumb(2), FALSE for ARM instruction stream - @param Extended TRUE dump hex for instruction too. - @param ItBlock Size of IT Block - @param Buf Buffer to sprintf disassembly into. - @param Size Size of Buf in bytes. - -**/ -VOID -DisassembleInstruction ( - IN UINT8 **OpCodePtr, - IN BOOLEAN Thumb, - IN BOOLEAN Extended, - IN OUT UINT32 *ItBlock, - OUT CHAR8 *Buf, - OUT UINTN Size - ) -{ - // Not yet supported for AArch64. - // Put error in the buffer as we have no return code and the buffer may be - // printed directly so needs a '\0'. - AsciiSPrint (Buf, Size, "AArch64 not supported"); - return; -} diff --git a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c deleted file mode 100644 index 0e09062957..0000000000 --- a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c +++ /dev/null @@ -1,465 +0,0 @@ -/** @file - Default exception handler - - Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
- Copyright (c) 2021, Arm Limited. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include -#include -#include -#include - -CHAR8 *gCondition[] = { - "EQ", - "NE", - "CS", - "CC", - "MI", - "PL", - "VS", - "VC", - "HI", - "LS", - "GE", - "LT", - "GT", - "LE", - "", - "2" -}; - -#define COND(_a) gCondition[((_a) >> 28)] - -CHAR8 *gReg[] = { - "r0", - "r1", - "r2", - "r3", - "r4", - "r5", - "r6", - "r7", - "r8", - "r9", - "r10", - "r11", - "r12", - "sp", - "lr", - "pc" -}; - -CHAR8 *gLdmAdr[] = { - "DA", - "IA", - "DB", - "IB" -}; - -CHAR8 *gLdmStack[] = { - "FA", - "FD", - "EA", - "ED" -}; - -#define LDM_EXT(_reg, _off) ((_reg == 13) ? gLdmStack[(_off)] : gLdmAdr[(_off)]) - -#define SIGN(_U) ((_U) ? "" : "-") -#define WRITE(_Write) ((_Write) ? "!" : "") -#define BYTE(_B) ((_B) ? "B":"") -#define USER(_B) ((_B) ? "^" : "") - -CHAR8 mMregListStr[4*15 + 1]; - -CHAR8 * -MRegList ( - UINT32 OpCode - ) -{ - UINTN Index, Start, End; - BOOLEAN First; - - mMregListStr[0] = '\0'; - AsciiStrCatS (mMregListStr, sizeof mMregListStr, "{"); - for (Index = 0, First = TRUE; Index <= 15; Index++) { - if ((OpCode & (1 << Index)) != 0) { - Start = End = Index; - for (Index++; ((OpCode & (1 << Index)) != 0) && Index <= 15; Index++) { - End = Index; - } - - if (!First) { - AsciiStrCatS (mMregListStr, sizeof mMregListStr, ","); - } else { - First = FALSE; - } - - if (Start == End) { - AsciiStrCatS (mMregListStr, sizeof mMregListStr, gReg[Start]); - AsciiStrCatS (mMregListStr, sizeof mMregListStr, ", "); - } else { - AsciiStrCatS (mMregListStr, sizeof mMregListStr, gReg[Start]); - AsciiStrCatS (mMregListStr, sizeof mMregListStr, "-"); - AsciiStrCatS (mMregListStr, sizeof mMregListStr, gReg[End]); - } - } - } - - if (First) { - AsciiStrCatS (mMregListStr, sizeof mMregListStr, "ERROR"); - } - - AsciiStrCatS (mMregListStr, sizeof mMregListStr, "}"); - - // BugBug: Make caller pass in buffer it is cleaner - return mMregListStr; -} - -CHAR8 * -FieldMask ( - IN UINT32 Mask - ) -{ - return ""; -} - -UINT32 -RotateRight ( - IN UINT32 Op, - IN UINT32 Shift - ) -{ - return (Op >> Shift) | (Op << (32 - Shift)); -} - -/** - Place a disassembly of **OpCodePtr into buffer, and update OpCodePtr to - point to next instruction. - - We cheat and only decode instructions that access - memory. If the instruction is not found we dump the instruction in hex. - - @param OpCodePtr Pointer to pointer of ARM instruction to disassemble. - @param Buf Buffer to sprintf disassembly into. - @param Size Size of Buf in bytes. - @param Extended TRUE dump hex for instruction too. - -**/ -VOID -DisassembleArmInstruction ( - IN UINT32 **OpCodePtr, - OUT CHAR8 *Buf, - OUT UINTN Size, - IN BOOLEAN Extended - ) -{ - UINT32 OpCode; - CHAR8 *Type; - CHAR8 *Root; - BOOLEAN Imm, Pre, Up, WriteBack, Write, Load, Sign, Half; - UINT32 Rn, Rd, Rm; - UINT32 IMod, Offset8, Offset12; - UINT32 Index; - UINT32 ShiftImm, Shift; - - OpCode = **OpCodePtr; - - Imm = (OpCode & BIT25) == BIT25; // I - Pre = (OpCode & BIT24) == BIT24; // P - Up = (OpCode & BIT23) == BIT23; // U - WriteBack = (OpCode & BIT22) == BIT22; // B, also called S - Write = (OpCode & BIT21) == BIT21; // W - Load = (OpCode & BIT20) == BIT20; // L - Sign = (OpCode & BIT6) == BIT6; // S - Half = (OpCode & BIT5) == BIT5; // H - Rn = (OpCode >> 16) & 0xf; - Rd = (OpCode >> 12) & 0xf; - Rm = (OpCode & 0xf); - - if (Extended) { - Index = AsciiSPrint (Buf, Size, "0x%08x ", OpCode); - Buf += Index; - Size -= Index; - } - - // LDREX, STREX - if ((OpCode & 0x0fe000f0) == 0x01800090) { - if (Load) { - // A4.1.27 LDREX{} , [] - AsciiSPrint (Buf, Size, "LDREX%a %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn]); - } else { - // A4.1.103 STREX{} , , [] - AsciiSPrint (Buf, Size, "STREX%a %a, %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn], gReg[Rn]); - } - - return; - } - - // LDM/STM - if ((OpCode & 0x0e000000) == 0x08000000) { - if (Load) { - // A4.1.20 LDM{} {!}, - // A4.1.21 LDM{} , ^ - // A4.1.22 LDM{} {!}, ^ - AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn, (OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack)); - } else { - // A4.1.97 STM{} {!}, - // A4.1.98 STM{} , ^ - AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn, (OpCode >> 23) & 3), gReg[Rn], WRITE (Write), MRegList (OpCode), USER (WriteBack)); - } - - return; - } - - // LDR/STR Address Mode 2 - if (((OpCode & 0x0c000000) == 0x04000000) || ((OpCode & 0xfd70f000) == 0xf550f000)) { - Offset12 = OpCode & 0xfff; - if ((OpCode & 0xfd70f000) == 0xf550f000) { - Index = AsciiSPrint (Buf, Size, "PLD"); - } else { - Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", Load ? "LDR" : "STR", COND (OpCode), BYTE (WriteBack), (!(Pre) && Write) ? "T" : "", gReg[Rd]); - } - - if (Pre) { - if (!Imm) { - // A5.2.2 [, #+/-] - // A5.2.5 [, #+/-] - AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x]%a", gReg[Rn], SIGN (Up), Offset12, WRITE (Write)); - } else if ((OpCode & 0x03000ff0) == 0x03000000) { - // A5.2.3 [, +/-] - // A5.2.6 [, +/-]! - AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a]%a", gReg[Rn], SIGN (Up), WRITE (Write)); - } else { - // A5.2.4 [, +/-, LSL #] - // A5.2.7 [, +/-, LSL #]! - ShiftImm = (OpCode >> 7) & 0x1f; - Shift = (OpCode >> 5) & 0x3; - if (Shift == 0x0) { - Type = "LSL"; - } else if (Shift == 0x1) { - Type = "LSR"; - if (ShiftImm == 0) { - ShiftImm = 32; - } - } else if (Shift == 0x2) { - Type = "ASR"; - } else if (ShiftImm == 0) { - AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (Up), gReg[Rm], WRITE (Write)); - return; - } else { - Type = "ROR"; - } - - AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm, WRITE (Write)); - } - } else { - // !Pre - if (!Imm) { - // A5.2.8 [], #+/- - AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (Up), Offset12); - } else if ((OpCode & 0x03000ff0) == 0x03000000) { - // A5.2.9 [], +/- - AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (Up), gReg[Rm]); - } else { - // A5.2.10 [], +/-, LSL # - ShiftImm = (OpCode >> 7) & 0x1f; - Shift = (OpCode >> 5) & 0x3; - - if (Shift == 0x0) { - Type = "LSL"; - } else if (Shift == 0x1) { - Type = "LSR"; - if (ShiftImm == 0) { - ShiftImm = 32; - } - } else if (Shift == 0x2) { - Type = "ASR"; - } else if (ShiftImm == 0) { - AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (Up), gReg[Rm]); - // FIx me - return; - } else { - Type = "ROR"; - } - - AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (Up), gReg[Rm], Type, ShiftImm); - } - } - - return; - } - - if ((OpCode & 0x0e000000) == 0x00000000) { - // LDR/STR address mode 3 - // LDR|STR{}H|SH|SB|D , - if (Load) { - if (!Sign) { - Root = "LDR%aH %a, "; - } else if (!Half) { - Root = "LDR%aSB %a, "; - } else { - Root = "LDR%aSH %a, "; - } - } else { - if (!Sign) { - Root = "STR%aH %a "; - } else if (!Half) { - Root = "LDR%aD %a "; - } else { - Root = "STR%aD %a "; - } - } - - Index = AsciiSPrint (Buf, Size, Root, COND (OpCode), gReg[Rd]); - - Sign = (OpCode & BIT6) == BIT6; - Half = (OpCode & BIT5) == BIT5; - Offset8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff; - if (Pre & !Write) { - // Immediate offset/index - if (WriteBack) { - // A5.3.2 [, #+/-] - // A5.3.4 [, #+/-]! - AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%d]%a", gReg[Rn], SIGN (Up), Offset8, WRITE (Write)); - } else { - // A5.3.3 [, +/-] - // A5.3.5 [, +/-]! - AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%]a", gReg[Rn], SIGN (Up), gReg[Rm], WRITE (Write)); - } - } else { - // Register offset/index - if (WriteBack) { - // A5.3.6 [], #+/- - AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%d", gReg[Rn], SIGN (Up), Offset8); - } else { - // A5.3.7 [], +/- - AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (Up), gReg[Rm]); - } - } - - return; - } - - if ((OpCode & 0x0fb000f0) == 0x01000050) { - // A4.1.108 SWP SWP{}B , , [] - // A4.1.109 SWPB SWP{}B , , [] - AsciiSPrint (Buf, Size, "SWP%a%a %a, %a, [%a]", COND (OpCode), BYTE (WriteBack), gReg[Rd], gReg[Rm], gReg[Rn]); - return; - } - - if ((OpCode & 0xfe5f0f00) == 0xf84d0500) { - // A4.1.90 SRS SRS #{!} - AsciiSPrint (Buf, Size, "SRS%a #0x%x%a", gLdmStack[(OpCode >> 23) & 3], OpCode & 0x1f, WRITE (Write)); - return; - } - - if ((OpCode & 0xfe500f00) == 0xf8100500) { - // A4.1.59 RFE {!} - AsciiSPrint (Buf, Size, "RFE%a %a", gLdmStack[(OpCode >> 23) & 3], gReg[Rn], WRITE (Write)); - return; - } - - if ((OpCode & 0xfff000f0) == 0xe1200070) { - // A4.1.7 BKPT - AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff); - return; - } - - if ((OpCode & 0xfff10020) == 0xf1000000) { - // A4.1.16 CPS {, #} - if (((OpCode >> 6) & 0x7) == 0) { - AsciiSPrint (Buf, Size, "CPS #0x%x", (OpCode & 0x2f)); - } else { - IMod = (OpCode >> 18) & 0x3; - Index = AsciiSPrint ( - Buf, - Size, - "CPS%a %a%a%a", - (IMod == 3) ? "ID" : "IE", - ((OpCode & BIT8) != 0) ? "A" : "", - ((OpCode & BIT7) != 0) ? "I" : "", - ((OpCode & BIT6) != 0) ? "F" : "" - ); - if ((OpCode & BIT17) != 0) { - AsciiSPrint (&Buf[Index], Size - Index, ", #0x%x", OpCode & 0x1f); - } - } - - return; - } - - if ((OpCode & 0x0f000000) == 0x0f000000) { - // A4.1.107 SWI{} - AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff); - return; - } - - if ((OpCode & 0x0fb00000) == 0x01000000) { - // A4.1.38 MRS{} , CPSR MRS{} , SPSR - AsciiSPrint (Buf, Size, "MRS%a %a, %a", COND (OpCode), gReg[Rd], WriteBack ? "SPSR" : "CPSR"); - return; - } - - if ((OpCode & 0x0db00000) == 0x01200000) { - // A4.1.38 MSR{} CPSR_, # MSR{} CPSR_, - if (Imm) { - // MSR{} CPSR_, # - AsciiSPrint (Buf, Size, "MRS%a %a_%a, #0x%x", COND (OpCode), WriteBack ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateRight (OpCode & 0xf, ((OpCode >> 8) & 0xf) *2)); - } else { - // MSR{} CPSR_, - AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), WriteBack ? "SPSR" : "CPSR", gReg[Rd]); - } - - return; - } - - if ((OpCode & 0xff000010) == 0xfe000000) { - // A4.1.13 CDP{} , , , , , - AsciiSPrint (Buf, Size, "CDP%a 0x%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, Rd, Rm, (OpCode >> 5) &0x7); - return; - } - - if ((OpCode & 0x0e000000) == 0x0c000000) { - // A4.1.19 LDC and A4.1.96 SDC - if ((OpCode & 0xf0000000) == 0xf0000000) { - Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", Load ? "LDC" : "SDC", (OpCode >> 8) & 0xf, Rd); - } else { - Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ", Load ? "LDC" : "SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd); - } - - if (!Pre) { - if (!Write) { - // A5.5.5.5 [],