mirror of https://github.com/acidanthera/audk.git
IntelFsp2Pkg: X64 compatible changes to support PEI in 64bit
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893 1.Added EFIAPI to FspNotifyPhasePeimEntryPoint, SwapStack and PEI_CORE_ENTRY. 2.Treat both MAX_ADDRESS and MAX_UINT32 as invalid address for FSP global data in FspApiCallingCheck(). 3.Changed AsmReadEsp to AsmReadStackPointer. 4.Changed the type of the return value of AsmReadStackPointer from UINT32 to UINTN. 5.Changed the type of TemporaryMemoryBase, PermenentMemoryBase and BootLoaderStack from UINT32 to UINTN. 6.Some type casting to pointers are UINT32. Changed them to UINTN to accommodate both IA32 and X64. 7.Corrected some typos. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ashraf Ali S <ashraf.ali.s@intel.com> Signed-off-by: Ted Kuo <ted.kuo@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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@ -1,7 +1,7 @@
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/** @file
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Source file for FSP notify phase PEI module
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Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
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Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -112,6 +112,7 @@ WaitForNotify (
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@retval EFI_OUT_OF_RESOURCES Insufficient resources to create database
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**/
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EFI_STATUS
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EFIAPI
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FspNotifyPhasePeimEntryPoint (
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IN EFI_PEI_FILE_HANDLE FileHandle,
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IN CONST EFI_PEI_SERVICES **PeiServices
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@ -1,7 +1,7 @@
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;; @file
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; Provide read ESP function
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;
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; Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;;
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;------------------------------------------------------------------------------
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@ -9,14 +9,14 @@
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SECTION .text
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;------------------------------------------------------------------------------
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; UINT32
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; UINTN
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; EFIAPI
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; AsmReadEsp (
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; AsmReadStackPointer (
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; VOID
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(AsmReadEsp)
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ASM_PFX(AsmReadEsp):
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global ASM_PFX(AsmReadStackPointer)
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ASM_PFX(AsmReadStackPointer):
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mov eax, esp
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ret
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@ -1,6 +1,6 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Abstract:
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@ -9,20 +9,20 @@
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;
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;------------------------------------------------------------------------------
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SECTION .text
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SECTION .text
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; SecSwitchStack (
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; UINT32 TemporaryMemoryBase,
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; UINT32 PermenentMemoryBase
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; UINT32 PermanentMemoryBase
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(SecSwitchStack)
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ASM_PFX(SecSwitchStack):
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;
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; Save three register: eax, ebx, ecx
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; Save four register: eax, ebx, ecx, edx
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;
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push eax
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push ebx
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@ -55,7 +55,7 @@ ASM_PFX(SecSwitchStack):
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mov dword [eax + 12], edx
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mov edx, dword [esp + 16] ; Update this function's return address into permanent memory
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mov dword [eax + 16], edx
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mov esp, eax ; From now, esp is pointed to permanent memory
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mov esp, eax ; From now, esp is pointed to permanent memory
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;
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; Fixup the ebp point to permanent memory
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@ -63,7 +63,7 @@ ASM_PFX(SecSwitchStack):
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mov eax, ebp
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sub eax, ebx
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add eax, ecx
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mov ebp, eax ; From now, ebp is pointed to permanent memory
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mov ebp, eax ; From now, ebp is pointed to permanent memory
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pop edx
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pop ecx
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@ -1,6 +1,6 @@
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/** @file
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Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -26,7 +26,7 @@ FspGetExceptionHandler (
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IA32_IDT_GATE_DESCRIPTOR *IdtGateDescriptor;
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FSP_INFO_HEADER *FspInfoHeader;
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FspInfoHeader = (FSP_INFO_HEADER *)AsmGetFspInfoHeader ();
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FspInfoHeader = (FSP_INFO_HEADER *)(UINTN)AsmGetFspInfoHeader ();
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ExceptionHandler = IdtEntryTemplate;
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IdtGateDescriptor = (IA32_IDT_GATE_DESCRIPTOR *)&ExceptionHandler;
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Entry = (IdtGateDescriptor->Bits.OffsetHigh << 16) | IdtGateDescriptor->Bits.OffsetLow;
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@ -115,7 +115,7 @@ SecGetPlatformData (
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VOID
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FspGlobalDataInit (
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IN OUT FSP_GLOBAL_DATA *PeiFspData,
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IN UINT32 BootLoaderStack,
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IN UINTN BootLoaderStack,
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IN UINT8 ApiIdx
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)
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{
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@ -141,7 +141,7 @@ FspGlobalDataInit (
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// Get FSP Header offset
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// It may have multiple FVs, so look into the last one for FSP header
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//
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PeiFspData->FspInfoHeader = (FSP_INFO_HEADER *)AsmGetFspInfoHeader ();
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PeiFspData->FspInfoHeader = (FSP_INFO_HEADER *)(UINTN)AsmGetFspInfoHeader ();
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SecGetPlatformData (PeiFspData);
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//
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@ -154,7 +154,7 @@ FspGlobalDataInit (
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//
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FspmUpdDataPtr = (VOID *)GetFspApiParameter ();
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if (FspmUpdDataPtr == NULL) {
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FspmUpdDataPtr = (VOID *)(PeiFspData->FspInfoHeader->ImageBase + PeiFspData->FspInfoHeader->CfgRegionOffset);
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FspmUpdDataPtr = (VOID *)(UINTN)(PeiFspData->FspInfoHeader->ImageBase + PeiFspData->FspInfoHeader->CfgRegionOffset);
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}
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SetFspUpdDataPointer (FspmUpdDataPtr);
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/** @file
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Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -48,7 +48,7 @@ FspGetExceptionHandler (
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VOID
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FspGlobalDataInit (
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IN OUT FSP_GLOBAL_DATA *PeiFspData,
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IN UINT32 BootLoaderStack,
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IN UINTN BootLoaderStack,
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IN UINT8 ApiIdx
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);
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@ -1,6 +1,6 @@
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/** @file
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Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -31,7 +31,7 @@ FspApiCallingCheck (
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//
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// NotifyPhase check
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//
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if ((FspData == NULL) || ((UINT32)FspData == 0xFFFFFFFF)) {
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if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) || ((UINTN)FspData == MAX_UINT32)) {
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Status = EFI_UNSUPPORTED;
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} else {
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if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
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//
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// FspMemoryInit check
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//
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if ((UINT32)FspData != 0xFFFFFFFF) {
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if (((UINTN)FspData != MAX_ADDRESS) && ((UINTN)FspData != MAX_UINT32)) {
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Status = EFI_UNSUPPORTED;
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} else if (EFI_ERROR (FspUpdSignatureCheck (ApiIdx, ApiParam))) {
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Status = EFI_INVALID_PARAMETER;
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//
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// TempRamExit check
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//
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if ((FspData == NULL) || ((UINT32)FspData == 0xFFFFFFFF)) {
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if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) || ((UINTN)FspData == MAX_UINT32)) {
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Status = EFI_UNSUPPORTED;
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} else {
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if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
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//
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// FspSiliconInit check
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//
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if ((FspData == NULL) || ((UINT32)FspData == 0xFFFFFFFF)) {
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if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) || ((UINTN)FspData == MAX_UINT32)) {
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Status = EFI_UNSUPPORTED;
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} else {
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if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
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/** @file
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Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -54,7 +54,7 @@ SecStartup (
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IN UINT32 TempRamBase,
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IN VOID *BootFirmwareVolume,
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IN PEI_CORE_ENTRY PeiCore,
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IN UINT32 BootLoaderStack,
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IN UINTN BootLoaderStack,
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IN UINT32 ApiIdx
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)
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{
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GetFspGlobalDataPointer ()->OnSeparateStack = 1;
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if (PcdGet8 (PcdFspHeapSizePercentage) == 0) {
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CurrentStack = AsmReadEsp ();
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CurrentStack = AsmReadStackPointer ();
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FspStackBase = (UINTN)GetFspEntryStack ();
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StackSize = FspStackBase - CurrentStack;
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// permanent memory.
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//
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SecSwitchStack (
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(UINT32)(UINTN)OldStack,
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(UINT32)(UINTN)NewStack
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(UINTN)OldStack,
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(UINTN)NewStack
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);
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return EFI_SUCCESS;
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@ -1,6 +1,6 @@
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/** @file
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Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Library/UefiCpuLib.h>
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#include <FspEas.h>
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typedef VOID (*PEI_CORE_ENTRY) ( \
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IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData, \
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IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList \
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typedef
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VOID
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(EFIAPI *PEI_CORE_ENTRY) (
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IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData,
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IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList
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);
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typedef struct _SEC_IDT_TABLE {
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VOID
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EFIAPI
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SecSwitchStack (
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IN UINT32 TemporaryMemoryBase,
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IN UINT32 PermenentMemoryBase
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IN UINTN TemporaryMemoryBase,
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IN UINTN PermenentMemoryBase
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);
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/**
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IN UINT32 TempRamBase,
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IN VOID *BootFirmwareVolume,
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IN PEI_CORE_ENTRY PeiCore,
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IN UINT32 BootLoaderStack,
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IN UINTN BootLoaderStack,
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IN UINT32 ApiIdx
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);
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@return value of esp.
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**/
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UINT32
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UINTN
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EFIAPI
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AsmReadEsp (
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AsmReadStackPointer (
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VOID
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);
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@ -1,6 +1,6 @@
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/** @file
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Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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**/
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UINTN
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EFIAPI
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SwapStack (
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IN UINTN NewStack
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)
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; This is the code that goes from real-mode to protected mode.
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; It consumes the reset vector, configures the stack.
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;
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; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;;
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@ -16,7 +16,7 @@ SECTION .text
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%macro RET_ESI 0
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movd esi, mm7 ; restore ESP from MM7
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movd esi, mm7 ; restore EIP from MM7
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jmp esi
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%endmacro
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