IntelFsp2Pkg: X64 compatible changes to support PEI in 64bit

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893
1.Added EFIAPI to FspNotifyPhasePeimEntryPoint, SwapStack and
  PEI_CORE_ENTRY.
2.Treat both MAX_ADDRESS and MAX_UINT32 as invalid address for
  FSP global data in FspApiCallingCheck().
3.Changed AsmReadEsp to AsmReadStackPointer.
4.Changed the type of the return value of AsmReadStackPointer
  from UINT32 to UINTN.
5.Changed the type of TemporaryMemoryBase, PermenentMemoryBase
  and BootLoaderStack from UINT32 to UINTN.
6.Some type casting to pointers are UINT32. Changed them to
  UINTN to accommodate both IA32 and X64.
7.Corrected some typos.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Signed-off-by: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
This commit is contained in:
Ted Kuo 2022-04-15 01:37:36 -07:00 committed by mergify[bot]
parent 9bf7291d63
commit 630df8c86e
10 changed files with 45 additions and 41 deletions

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@ -1,7 +1,7 @@
/** @file
Source file for FSP notify phase PEI module
Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -112,6 +112,7 @@ WaitForNotify (
@retval EFI_OUT_OF_RESOURCES Insufficient resources to create database
**/
EFI_STATUS
EFIAPI
FspNotifyPhasePeimEntryPoint (
IN EFI_PEI_FILE_HANDLE FileHandle,
IN CONST EFI_PEI_SERVICES **PeiServices

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@ -1,7 +1,7 @@
;; @file
; Provide read ESP function
;
; Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;;
;------------------------------------------------------------------------------
@ -9,14 +9,14 @@
SECTION .text
;------------------------------------------------------------------------------
; UINT32
; UINTN
; EFIAPI
; AsmReadEsp (
; AsmReadStackPointer (
; VOID
; );
;------------------------------------------------------------------------------
global ASM_PFX(AsmReadEsp)
ASM_PFX(AsmReadEsp):
global ASM_PFX(AsmReadStackPointer)
ASM_PFX(AsmReadStackPointer):
mov eax, esp
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Abstract:
@ -9,20 +9,20 @@
;
;------------------------------------------------------------------------------
SECTION .text
SECTION .text
;------------------------------------------------------------------------------
; VOID
; EFIAPI
; SecSwitchStack (
; UINT32 TemporaryMemoryBase,
; UINT32 PermenentMemoryBase
; UINT32 PermanentMemoryBase
; );
;------------------------------------------------------------------------------
global ASM_PFX(SecSwitchStack)
ASM_PFX(SecSwitchStack):
;
; Save three register: eax, ebx, ecx
; Save four register: eax, ebx, ecx, edx
;
push eax
push ebx
@ -55,7 +55,7 @@ ASM_PFX(SecSwitchStack):
mov dword [eax + 12], edx
mov edx, dword [esp + 16] ; Update this function's return address into permanent memory
mov dword [eax + 16], edx
mov esp, eax ; From now, esp is pointed to permanent memory
mov esp, eax ; From now, esp is pointed to permanent memory
;
; Fixup the ebp point to permanent memory
@ -63,7 +63,7 @@ ASM_PFX(SecSwitchStack):
mov eax, ebp
sub eax, ebx
add eax, ecx
mov ebp, eax ; From now, ebp is pointed to permanent memory
mov ebp, eax ; From now, ebp is pointed to permanent memory
pop edx
pop ecx

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@ -1,6 +1,6 @@
/** @file
Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -26,7 +26,7 @@ FspGetExceptionHandler (
IA32_IDT_GATE_DESCRIPTOR *IdtGateDescriptor;
FSP_INFO_HEADER *FspInfoHeader;
FspInfoHeader = (FSP_INFO_HEADER *)AsmGetFspInfoHeader ();
FspInfoHeader = (FSP_INFO_HEADER *)(UINTN)AsmGetFspInfoHeader ();
ExceptionHandler = IdtEntryTemplate;
IdtGateDescriptor = (IA32_IDT_GATE_DESCRIPTOR *)&ExceptionHandler;
Entry = (IdtGateDescriptor->Bits.OffsetHigh << 16) | IdtGateDescriptor->Bits.OffsetLow;
@ -115,7 +115,7 @@ SecGetPlatformData (
VOID
FspGlobalDataInit (
IN OUT FSP_GLOBAL_DATA *PeiFspData,
IN UINT32 BootLoaderStack,
IN UINTN BootLoaderStack,
IN UINT8 ApiIdx
)
{
@ -141,7 +141,7 @@ FspGlobalDataInit (
// Get FSP Header offset
// It may have multiple FVs, so look into the last one for FSP header
//
PeiFspData->FspInfoHeader = (FSP_INFO_HEADER *)AsmGetFspInfoHeader ();
PeiFspData->FspInfoHeader = (FSP_INFO_HEADER *)(UINTN)AsmGetFspInfoHeader ();
SecGetPlatformData (PeiFspData);
//
@ -154,7 +154,7 @@ FspGlobalDataInit (
//
FspmUpdDataPtr = (VOID *)GetFspApiParameter ();
if (FspmUpdDataPtr == NULL) {
FspmUpdDataPtr = (VOID *)(PeiFspData->FspInfoHeader->ImageBase + PeiFspData->FspInfoHeader->CfgRegionOffset);
FspmUpdDataPtr = (VOID *)(UINTN)(PeiFspData->FspInfoHeader->ImageBase + PeiFspData->FspInfoHeader->CfgRegionOffset);
}
SetFspUpdDataPointer (FspmUpdDataPtr);

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@ -1,6 +1,6 @@
/** @file
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -48,7 +48,7 @@ FspGetExceptionHandler (
VOID
FspGlobalDataInit (
IN OUT FSP_GLOBAL_DATA *PeiFspData,
IN UINT32 BootLoaderStack,
IN UINTN BootLoaderStack,
IN UINT8 ApiIdx
);

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@ -1,6 +1,6 @@
/** @file
Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -31,7 +31,7 @@ FspApiCallingCheck (
//
// NotifyPhase check
//
if ((FspData == NULL) || ((UINT32)FspData == 0xFFFFFFFF)) {
if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) || ((UINTN)FspData == MAX_UINT32)) {
Status = EFI_UNSUPPORTED;
} else {
if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
@ -42,7 +42,7 @@ FspApiCallingCheck (
//
// FspMemoryInit check
//
if ((UINT32)FspData != 0xFFFFFFFF) {
if (((UINTN)FspData != MAX_ADDRESS) && ((UINTN)FspData != MAX_UINT32)) {
Status = EFI_UNSUPPORTED;
} else if (EFI_ERROR (FspUpdSignatureCheck (ApiIdx, ApiParam))) {
Status = EFI_INVALID_PARAMETER;
@ -51,7 +51,7 @@ FspApiCallingCheck (
//
// TempRamExit check
//
if ((FspData == NULL) || ((UINT32)FspData == 0xFFFFFFFF)) {
if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) || ((UINTN)FspData == MAX_UINT32)) {
Status = EFI_UNSUPPORTED;
} else {
if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {
@ -62,7 +62,7 @@ FspApiCallingCheck (
//
// FspSiliconInit check
//
if ((FspData == NULL) || ((UINT32)FspData == 0xFFFFFFFF)) {
if ((FspData == NULL) || ((UINTN)FspData == MAX_ADDRESS) || ((UINTN)FspData == MAX_UINT32)) {
Status = EFI_UNSUPPORTED;
} else {
if (FspData->Signature != FSP_GLOBAL_DATA_SIGNATURE) {

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@ -1,6 +1,6 @@
/** @file
Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -54,7 +54,7 @@ SecStartup (
IN UINT32 TempRamBase,
IN VOID *BootFirmwareVolume,
IN PEI_CORE_ENTRY PeiCore,
IN UINT32 BootLoaderStack,
IN UINTN BootLoaderStack,
IN UINT32 ApiIdx
)
{
@ -233,7 +233,7 @@ SecTemporaryRamSupport (
GetFspGlobalDataPointer ()->OnSeparateStack = 1;
if (PcdGet8 (PcdFspHeapSizePercentage) == 0) {
CurrentStack = AsmReadEsp ();
CurrentStack = AsmReadStackPointer ();
FspStackBase = (UINTN)GetFspEntryStack ();
StackSize = FspStackBase - CurrentStack;
@ -292,8 +292,8 @@ SecTemporaryRamSupport (
// permanent memory.
//
SecSwitchStack (
(UINT32)(UINTN)OldStack,
(UINT32)(UINTN)NewStack
(UINTN)OldStack,
(UINTN)NewStack
);
return EFI_SUCCESS;

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@ -1,6 +1,6 @@
/** @file
Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -23,9 +23,11 @@
#include <Library/UefiCpuLib.h>
#include <FspEas.h>
typedef VOID (*PEI_CORE_ENTRY) ( \
IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData, \
IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList \
typedef
VOID
(EFIAPI *PEI_CORE_ENTRY) (
IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData,
IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList
);
typedef struct _SEC_IDT_TABLE {
@ -51,8 +53,8 @@ typedef struct _SEC_IDT_TABLE {
VOID
EFIAPI
SecSwitchStack (
IN UINT32 TemporaryMemoryBase,
IN UINT32 PermenentMemoryBase
IN UINTN TemporaryMemoryBase,
IN UINTN PermenentMemoryBase
);
/**
@ -104,7 +106,7 @@ SecStartup (
IN UINT32 TempRamBase,
IN VOID *BootFirmwareVolume,
IN PEI_CORE_ENTRY PeiCore,
IN UINT32 BootLoaderStack,
IN UINTN BootLoaderStack,
IN UINT32 ApiIdx
);
@ -127,9 +129,9 @@ ProcessLibraryConstructorList (
@return value of esp.
**/
UINT32
UINTN
EFIAPI
AsmReadEsp (
AsmReadStackPointer (
VOID
);

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@ -1,6 +1,6 @@
/** @file
Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -21,6 +21,7 @@
**/
UINTN
EFIAPI
SwapStack (
IN UINTN NewStack
)

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@ -2,7 +2,7 @@
; This is the code that goes from real-mode to protected mode.
; It consumes the reset vector, configures the stack.
;
; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;;
@ -16,7 +16,7 @@ SECTION .text
%macro RET_ESI 0
movd esi, mm7 ; restore ESP from MM7
movd esi, mm7 ; restore EIP from MM7
jmp esi
%endmacro