EmbeddedPkg/Lan9118Dxe: Remove link check in SNP initialization

The UEFI specification does not require the initialisation and reset
interface to check if an Ethernet cable is connected or not, and provides
the GetStatus() interface to do this. Furthermore, the 'Managed Network
Protocol' take care of the cable connection check in edk2 network stack.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16326 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ronald Cron 2014-11-11 00:49:50 +00:00 committed by oliviermartin
parent bb5420bb2b
commit 6382e5df4e
3 changed files with 3 additions and 19 deletions

View File

@ -283,7 +283,7 @@ SnpInitialize (
}
// Initiate a PHY reset
Status = PhySoftReset (PHY_RESET_PMT | PHY_RESET_CHECK_LINK, Snp);
Status = PhySoftReset (PHY_RESET_PMT, Snp);
if (EFI_ERROR (Status)) {
Snp->Mode->State = EfiSimpleNetworkStopped;
DEBUG ((EFI_D_WARN, "Warning: Link not ready after TimeOut. Check ethernet cable\n"));
@ -403,7 +403,7 @@ SnpReset (
}
// Initiate a PHY reset
Status = PhySoftReset (PHY_RESET_PMT | PHY_RESET_CHECK_LINK, Snp);
Status = PhySoftReset (PHY_RESET_PMT, Snp);
if (EFI_ERROR (Status)) {
Snp->Mode->State = EfiSimpleNetworkStopped;
return EFI_NOT_STARTED;

View File

@ -491,7 +491,6 @@ PhySoftReset (
)
{
UINT32 PmtCtrl = 0;
UINT32 LinkTo = 0;
// PMT PHY reset takes precedence over BCR
if (Flags & PHY_RESET_PMT) {
@ -513,20 +512,6 @@ PhySoftReset (
}
}
// Check the link status
if (Flags & PHY_RESET_CHECK_LINK) {
LinkTo = 100000; // 2 second (could be 50% more)
while (EFI_ERROR (CheckLinkStatus (0, Snp)) && (LinkTo > 0)) {
gBS->Stall (LAN9118_STALL);
LinkTo--;
}
// Timed out
if (LinkTo <= 0) {
return EFI_TIMEOUT;
}
}
// Clear and acknowledge all interrupts
if (Flags & PHY_SOFT_RESET_CLEAR_INT) {
MmioWrite32 (LAN9118_INT_EN, 0);

View File

@ -115,8 +115,7 @@ SoftReset (
// Flags for PHY reset
#define PHY_RESET_PMT BIT0
#define PHY_RESET_BCR BIT1
#define PHY_RESET_CHECK_LINK BIT2
#define PHY_SOFT_RESET_CLEAR_INT BIT3
#define PHY_SOFT_RESET_CLEAR_INT BIT2
// Perform PHY software reset
EFI_STATUS