mirror of https://github.com/acidanthera/audk.git
MdeModulePkg/SdMmcPciHcDxe: Do not map memory for non DMA transfer
Driver code used to map memory for DMA transfer even if host doesn't support DMA. This is causing memory corruption when driver transfers data using PIO. This change refactors the code to skip call to PciIo->Map for non DMA transfers. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Tested-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
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@ -1724,6 +1724,62 @@ SdMmcPrintTrb (
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SdMmcPrintPacket (DebugLevel, Trb->Packet);
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}
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/**
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Sets up host memory to allow DMA transfer.
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@param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.
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@param[in] Slot The slot number of the SD card to send the command to.
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@param[in] Packet A pointer to the SD command data structure.
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@retval EFI_SUCCESS Memory has been mapped for DMA transfer.
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@retval Others Memory has not been mapped.
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**/
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EFI_STATUS
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SdMmcSetupMemoryForDmaTransfer (
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IN SD_MMC_HC_PRIVATE_DATA *Private,
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IN UINT8 Slot,
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IN SD_MMC_HC_TRB *Trb
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)
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{
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EFI_PCI_IO_PROTOCOL_OPERATION Flag;
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EFI_PCI_IO_PROTOCOL *PciIo;
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UINTN MapLength;
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EFI_STATUS Status;
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if (Trb->Read) {
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Flag = EfiPciIoOperationBusMasterWrite;
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} else {
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Flag = EfiPciIoOperationBusMasterRead;
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}
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PciIo = Private->PciIo;
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if (Trb->Data != NULL && Trb->DataLen != 0) {
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MapLength = Trb->DataLen;
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Status = PciIo->Map (
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PciIo,
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Flag,
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Trb->Data,
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&MapLength,
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&Trb->DataPhy,
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&Trb->DataMap
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);
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if (EFI_ERROR (Status) || (Trb->DataLen != MapLength)) {
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return EFI_BAD_BUFFER_SIZE;
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}
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}
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if (Trb->Mode == SdMmcAdma32bMode ||
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Trb->Mode == SdMmcAdma64bV3Mode ||
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Trb->Mode == SdMmcAdma64bV4Mode) {
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Status = BuildAdmaDescTable (Trb, Private->ControllerVersion[Slot]);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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}
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return EFI_SUCCESS;
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}
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/**
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Create a new TRB for the SD/MMC cmd request.
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@ -1748,9 +1804,6 @@ SdMmcCreateTrb (
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SD_MMC_HC_TRB *Trb;
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EFI_STATUS Status;
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EFI_TPL OldTpl;
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EFI_PCI_IO_PROTOCOL_OPERATION Flag;
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EFI_PCI_IO_PROTOCOL *PciIo;
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UINTN MapLength;
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Trb = AllocateZeroPool (sizeof (SD_MMC_HC_TRB));
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if (Trb == NULL) {
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@ -1793,29 +1846,6 @@ SdMmcCreateTrb (
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(Packet->SdMmcCmdBlk->CommandIndex == SD_SEND_TUNING_BLOCK))) {
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Trb->Mode = SdMmcPioMode;
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} else {
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if (Trb->Read) {
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Flag = EfiPciIoOperationBusMasterWrite;
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} else {
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Flag = EfiPciIoOperationBusMasterRead;
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}
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PciIo = Private->PciIo;
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if (Trb->DataLen != 0) {
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MapLength = Trb->DataLen;
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Status = PciIo->Map (
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PciIo,
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Flag,
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Trb->Data,
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&MapLength,
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&Trb->DataPhy,
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&Trb->DataMap
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);
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if (EFI_ERROR (Status) || (Trb->DataLen != MapLength)) {
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Status = EFI_BAD_BUFFER_SIZE;
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goto Error;
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}
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}
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if (Trb->DataLen == 0) {
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Trb->Mode = SdMmcNoData;
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} else if (Private->Capability[Slot].Adma2 != 0) {
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@ -1833,12 +1863,16 @@ SdMmcCreateTrb (
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if (Private->ControllerVersion[Slot] >= SD_MMC_HC_CTRL_VER_410) {
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Trb->AdmaLengthMode = SdMmcAdmaLen26b;
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}
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Status = BuildAdmaDescTable (Trb, Private->ControllerVersion[Slot]);
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Status = SdMmcSetupMemoryForDmaTransfer (Private, Slot, Trb);
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if (EFI_ERROR (Status)) {
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goto Error;
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}
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} else if (Private->Capability[Slot].Sdma != 0) {
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Trb->Mode = SdMmcSdmaMode;
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Status = SdMmcSetupMemoryForDmaTransfer (Private, Slot, Trb);
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if (EFI_ERROR (Status)) {
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goto Error;
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}
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} else {
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Trb->Mode = SdMmcPioMode;
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}
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