MdePkg BaseLib: Convert Ia32/ARShiftU64.asm to NASM

The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
Ia32/ARShiftU64.asm to Ia32/ARShiftU64.nasm

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Jordan Justen 2016-05-30 18:51:59 -07:00 committed by Liming Gao
parent f8e49a6add
commit 649509ef6e
2 changed files with 47 additions and 0 deletions

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@ -338,6 +338,7 @@
Ia32/CpuId.asm | INTEL
Ia32/CpuBreakpoint.nasm| INTEL
Ia32/CpuBreakpoint.asm | INTEL
Ia32/ARShiftU64.nasm| INTEL
Ia32/ARShiftU64.asm | INTEL
Ia32/Thunk16.nasm | INTEL
Ia32/Thunk16.asm | INTEL
@ -388,6 +389,7 @@
Ia32/RRotU64.S | GCC
Ia32/LRotU64.nasm| GCC
Ia32/LRotU64.S | GCC
Ia32/ARShiftU64.nasm| GCC
Ia32/ARShiftU64.S | GCC
Ia32/RShiftU64.nasm| GCC
Ia32/RShiftU64.S | GCC

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@ -0,0 +1,45 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
; Module Name:
;
; ARShiftU64.nasm
;
; Abstract:
;
; 64-bit arithmetic right shift function for IA-32
;
;------------------------------------------------------------------------------
SECTION .text
;------------------------------------------------------------------------------
; UINT64
; EFIAPI
; InternalMathARShiftU64 (
; IN UINT64 Operand,
; IN UINTN Count
; );
;------------------------------------------------------------------------------
global ASM_PFX(InternalMathARShiftU64)
ASM_PFX(InternalMathARShiftU64):
mov cl, [esp + 12]
mov eax, [esp + 8]
cdq
test cl, 32
jnz .0
mov edx, eax
mov eax, [esp + 4]
.0:
shrd eax, edx, cl
sar edx, cl
ret