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QuarkPlatformPkg: Fix typos in comments 

- TURE -> TRUE
- reseting -> resetting
- retore -> restore
- boundry -> boundary
- tempory -> temporary

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Kelly Steele <kelly.steele@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gary Lin <glin@suse.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
This commit is contained in:
Gary Lin 2016-10-19 00:01:32 -07:00 committed by Michael Kinney
parent 17dc8ebc0d
commit 65aec00829
4 changed files with 10 additions and 10 deletions
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6
QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPciUpdate.c
View File

@ -87,7 +87,7 @@ SdtGetInteger (
@param OpCode Expected OpCode
@param SubOpCode Expected SubOpCode
@retval TURE This handle has expected opcode
@retval TRUE This handle has expected opcode
@retval FALSE This handle does not have expected opcode
**/
BOOLEAN
@ -127,7 +127,7 @@ SdtIsThisTypeObject (
@param Name Expected name
@param Value Expected name value
@retval TURE This handle has expected name and name value.
@retval TRUE This handle has expected name and name value.
@retval FALSE This handle does not have expected name and name value.
**/
BOOLEAN
@ -176,7 +176,7 @@ SdtIsNameIntegerValueEqual (
@param Name Expected name
@param Value Expected name value
@retval TURE This handle's children has expected name and name value.
@retval TRUE This handle's children has expected name and name value.
@retval FALSE This handle's children does not have expected name and name value.
**/
BOOLEAN

4
QuarkPlatformPkg/Acpi/Dxe/BootScriptExecutorDxe/ScriptExecute.c
View File

@ -4,7 +4,7 @@ This is the code for Boot Script Executer module.
This driver is dispatched by Dxe core and the driver will reload itself to ACPI NVS memory
in the entry point. The functionality is to interpret and restore the S3 boot script
Copyright (c) 2013-2015 Intel Corporation.
Copyright (c) 2013-2016 Intel Corporation.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@ -225,7 +225,7 @@ BootScriptExecutorEntryPoint (
}
ImageContext.ImageAddress = (PHYSICAL_ADDRESS)(UINTN)FfsBuffer;
//
// Align buffer on section boundry
// Align buffer on section boundary
//
ImageContext.ImageAddress += ImageContext.SectionAlignment - 1;
ImageContext.ImageAddress &= ~(ImageContext.SectionAlignment - 1);

4
QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.c
View File

@ -3,7 +3,7 @@ ACPISMM Driver implementation file.
This is QNC Smm platform driver
Copyright (c) 2013-2015 Intel Corporation.
Copyright (c) 2013-2016 Intel Corporation.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@ -501,7 +501,7 @@ RestoreQncS3SwCallback (
/*++
Routine Description:
SMI handler to retore QncS3 code & context for S3 path
SMI handler to restore QncS3 code & context for S3 path
This will be only triggered when BootScript got executed during resume
Arguments:

6
QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.c
View File

@ -142,7 +142,7 @@ SetLanControllerMacAddr (
SaveBarReg = PciRead32 (DevPcieAddr + R_IOH_MAC_MEMBAR);
//
// Use predefined tempory memory resource
// Use predefined temporary memory resource
//
PciWrite32 ( DevPcieAddr + R_IOH_MAC_MEMBAR, Bar0);
PciWrite8 ( DevPcieAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE);
@ -800,7 +800,7 @@ CheckForResetDueToErrors (
//
// Check if RMU reset system due to access violations.
// RMU updates a SOC Unit register before reseting the system.
// RMU updates a SOC Unit register before resetting the system.
//
RegValue = QNCAltPortRead (QUARK_SCSS_SOC_UNIT_SB_PORT_ID, QUARK_SCSS_SOC_UNIT_CFG_STICKY_RW);
if ((RegValue & B_CFG_STICKY_RW_VIOLATION) != 0) {
@ -1048,7 +1048,7 @@ EarlyPlatformGpioCtrlerInitAndManipulation (
SaveBarReg = PciRead32 (DevPcieAddr + PcdGet8 (PcdIohGpioBarRegister));
//
// Use predefined tempory memory resource.
// Use predefined temporary memory resource.
//
PciWrite32 ( DevPcieAddr + PcdGet8 (PcdIohGpioBarRegister), IohGpioBase);
PciWrite8 ( DevPcieAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE);